[PATCH] D90738: [RISCV] Support Zfh half-precision floating-point extension.

[Luís Marques via Phabricator via llvm-commits]

luismarques added a comment.

Overall this still looks good to me. Could you please just fix the following inconsistency?

  ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zfh -verify-machineinstrs \
  ; RUN:   -target-abi ilp32f < %s | FileCheck -check-prefix=RV32IZFH-ILP32F %s
  
  ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zfh -verify-machineinstrs \
  ; RUN:   -target-abi ilp32f < %s | FileCheck -check-prefix=RV32IF-ILP32F %s

Besides being inconsistent, the latter just seems wrong to me.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90738/new/

https://reviews.llvm.org/D90738