[llvm] 0fb76b9 - [AArch64][GlobalISel] Make <2 x p0> of G_SHUFFLE_VECTOR legal.

[Amara Emerson via llvm-commits]

Author: Amara Emerson
Date: 2020-11-23T22:59:35-08:00
New Revision: 0fb76b9035c8af48f63d965faadfb4b0e58b0a4f

URL: https://github.com/llvm/llvm-project/commit/0fb76b9035c8af48f63d965faadfb4b0e58b0a4f
DIFF: https://github.com/llvm/llvm-project/commit/0fb76b9035c8af48f63d965faadfb4b0e58b0a4f.diff

LOG: [AArch64][GlobalISel] Make <2 x p0> of G_SHUFFLE_VECTOR legal.

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index cdb825639c5f..d66862bd0997 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -650,7 +650,7 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
         // to be the same size as the dest.
         if (DstTy != SrcTy)
           return false;
-        for (auto &Ty : {v2s32, v4s32, v2s64, v16s8, v8s16}) {
+        for (auto &Ty : {v2s32, v4s32, v2s64, v2p0, v16s8, v8s16}) {
           if (DstTy == Ty)
             return true;
         }

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
index 22d9406ac4f6..264d85bad08d 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
@@ -43,6 +43,28 @@ body:             |
     $q0 = COPY %2(<2 x s64>)
     RET_ReallyLR implicit $q0
 
+...
+---
+name:            shuffle_v2p0
+alignment:       4
+tracksRegLiveness: true
+body:             |
+  bb.1:
+    liveins: $q0, $q1
+
+    ; CHECK-LABEL: name: shuffle_v2p0
+    ; CHECK: liveins: $q0, $q1
+    ; CHECK: [[COPY:%[0-9]+]]:_(<2 x p0>) = COPY $q0
+    ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x p0>) = COPY $q1
+    ; CHECK: [[SHUF:%[0-9]+]]:_(<2 x p0>) = G_SHUFFLE_VECTOR [[COPY]](<2 x p0>), [[COPY1]], shufflemask(0, 0)
+    ; CHECK: $q0 = COPY [[SHUF]](<2 x p0>)
+    ; CHECK: RET_ReallyLR implicit $q0
+    %0:_(<2 x p0>) = COPY $q0
+    %1:_(<2 x p0>) = COPY $q1
+    %2:_(<2 x p0>) = G_SHUFFLE_VECTOR %0(<2 x p0>), %1, shufflemask(0, 0)
+    $q0 = COPY %2(<2 x p0>)
+    RET_ReallyLR implicit $q0
+
 ...
 ---
 name:            shuffle_v16i8