[PATCH] D91972: Improve STRICT_FSETCC codegen in absence of no NaN

[Thomas Preud'homme via Phabricator via llvm-commits]

thopre created this revision.
thopre added reviewers: nickwasmer, fhahn, SjoerdMeijer.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.
thopre requested review of this revision.

As for SETCC, use a less expensive condition code when generating
STRICT_FSETCC if the node is known not to have Nan.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D91972

Files:
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/test/CodeGen/AArch64/arm64-fcmp-no-nans-opt.ll


Index: llvm/test/CodeGen/AArch64/arm64-fcmp-no-nans-opt.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/AArch64/arm64-fcmp-no-nans-opt.ll
@@ -0,0 +1,57 @@
+; RUN: llc < %s -mtriple=arm64-eabi -enable-no-nans-fp-math | FileCheck %s
+
+declare i1 @llvm.experimental.constrained.fcmp.f32(float, float, metadata, metadata)
+
+; CHECK-LABEL: @constrained_fcmp_ueq
+; CHECK: fcmp s0, s1
+; CHECK-NEXT: cset w0, eq
+; CHECK-NEXT: ret
+define i1 @constrained_fcmp_ueq(float %a, float %b) nounwind ssp {
+  %cmp = tail call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"ueq", metadata !"fpexcept.strict")
+  ret i1 %cmp
+}
+
+; CHECK-LABEL: @constrained_fcmp_une
+; CHECK: fcmp s0, s1
+; CHECK-NEXT: cset w0, ne
+; CHECK-NEXT: ret
+define i1 @constrained_fcmp_une(float %a, float %b) nounwind ssp {
+  %cmp = tail call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"une", metadata !"fpexcept.strict")
+  ret i1 %cmp
+}
+
+; CHECK-LABEL: @constrained_fcmp_ugt
+; CHECK: fcmp s0, s1
+; CHECK-NEXT: cset w0, gt
+; CHECK-NEXT: ret
+define i1 @constrained_fcmp_ugt(float %a, float %b) nounwind ssp {
+  %cmp = tail call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"ugt", metadata !"fpexcept.strict")
+  ret i1 %cmp
+}
+
+; CHECK-LABEL: @constrained_fcmp_uge
+; CHECK: fcmp s0, s1
+; CHECK-NEXT: cset w0, ge
+; CHECK-NEXT: ret
+define i1 @constrained_fcmp_uge(float %a, float %b) nounwind ssp {
+  %cmp = tail call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"uge", metadata !"fpexcept.strict")
+  ret i1 %cmp
+}
+
+; CHECK-LABEL: @constrained_fcmp_ult
+; CHECK: fcmp s0, s1
+; CHECK-NEXT: cset w0, lt
+; CHECK-NEXT: ret
+define i1 @constrained_fcmp_ult(float %a, float %b) nounwind ssp {
+  %cmp = tail call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"ult", metadata !"fpexcept.strict")
+  ret i1 %cmp
+}
+
+; CHECK-LABEL: @constrained_fcmp_ule
+; CHECK: fcmp s0, s1
+; CHECK-NEXT: cset w0, le
+; CHECK-NEXT: ret
+define i1 @constrained_fcmp_ule(float %a, float %b) nounwind ssp {
+  %cmp = tail call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"ule", metadata !"fpexcept.strict")
+  ret i1 %cmp
+}
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -7006,7 +7006,11 @@
   case ISD::STRICT_FSETCC:
   case ISD::STRICT_FSETCCS: {
     auto *FPCmp = dyn_cast<ConstrainedFPCmpIntrinsic>(&FPI);
-    Opers.push_back(DAG.getCondCode(getFCmpCondCode(FPCmp->getPredicate())));
+    ISD::CondCode Condition = getFCmpCondCode(FPCmp->getPredicate());
+    auto *FPMO = dyn_cast<FPMathOperator>(&FPI);
+    if ((FPMO && FPMO->hasNoNaNs()) || TM.Options.NoNaNsFPMath)
+      Condition = getFCmpCodeWithoutNaN(Condition);
+    Opers.push_back(DAG.getCondCode(Condition));
     break;
   }
   }


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