[PATCH] D72184: [BPF] support atomic instructions
Brendan Jackman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 23 07:21:02 PST 2020
jackmanb added a comment.
I thought a little more about something I was saying in the office hours.
I'm pretty sure GCC's `__atomic_store(&x, &y, order)` should fail to compile for anything other than `order=__ATOMIC_RELAXED`, since with the current kernel patchset we have `BPF_SET` (which is called `BPF_XCHG` in this LLVM patch) implemented with the kernel's `atomic_store`, which _doesn't imply a barrier_.
One alternative solution might be just to scrap `BPF_SET` without `BPF_FETCH` (`BPF_SET | BPF_FETCH` is implemented with `atomic_xchg` which _does_ imply a barrier IIUC). As we discussed in the office hours, `BPF_CMPSET` (called `BPF_CMPXCHG` in this LLVM patch) won't be supported without `BPF_FETCH`
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