[PATCH] D91527: [PowerPC][FP128] Fix the incorrect calling convention for IEEE long double on Power8
Qiu Chaofan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 23 00:12:56 PST 2020
qiucf added inline comments.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:124
+// TODO - Remove this opton if fp128 has been fully supported on Power8
+static cl::opt<bool>
----------------
`opton` -> `option`
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:126
+static cl::opt<bool>
+ EnableP8FP128("enable-p8-fp128",
+ cl::desc("temp option to enable fp128 on power8"), cl::Hidden);
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will it be better if using `enable-soft-fp128` instead of specifying the target is `P8`?
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1169
setOperationAction(ISD::BSWAP, MVT::v1i128, Legal);
+ } else if (Subtarget.hasAltivec() && EnableP8FP128) {
+ addRegisterClass(MVT::f128, &PPC::VRRCRegClass);
----------------
can we common some code in previous `if` and this `else`? I see some ops are also marked `Expand` under `P9`.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D91527/new/
https://reviews.llvm.org/D91527
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