[PATCH] D91339: [X86] Include %rip for 32-bit RIP-relative relocs for x32

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon reopened this revision.
RKSimon added a comment.
This revision is now accepted and ready to land.

@hvdijk On EXPENSIVE_CHECKS builds I'm seeing a build failure in pic.ll - please can you take a look?

  Command Output (stdout):
  --
  $ ":" "RUN: at line 1"
  $ "e:\llvm\ninja\bin\llc.exe" "-mcpu=generic" "-mtriple=i686-pc-linux-gnu" "-relocation-model=pic" "-asm-verbose=false" "-post-RA-scheduler=false"
  $ "e:\llvm\ninja\bin\filecheck.exe" "E:\llvm\llvm-project\llvm\test\CodeGen\X86\pic.ll" "-check-prefixes=CHECK,CHECK-I686"
  $ ":" "RUN: at line 2"
  $ "e:\llvm\ninja\bin\llc.exe" "-mcpu=generic" "-mtriple=x86_64-pc-linux-gnux32" "-relocation-model=pic" "-asm-verbose=false" "-post-RA-scheduler=false"
  # command stderr:
  
  # After X86 Fixup SetCC
  # Machine code for function test6: IsSSA, TracksLiveness
  Constant Pool:
    cp#0: [double 1.234560e+02, double 4.561230e+02], align=8
  Function Live Ins: $edi in %0
  
  bb.0.entry:
    liveins: $edi
    %0:gr32 = COPY $edi
    %5:gr32 = MOV32r0 implicit-def $eflags
    TEST32rr %0:gr32, %0:gr32, implicit-def $eflags
    %1:gr8 = SETCCr 4, implicit $eflags
    %6:gr32 = INSERT_SUBREG %5:gr32(tied-def 0), %1:gr8, %subreg.sub_8bit
    %3:gr32 = LEA64_32r $rip, 1, $noreg, %const.0, $noreg
    %4:fr64 = MOVSDrm_alt killed %3:gr32, 8, killed %6:gr32, 0, $noreg :: (load 8 from constant-pool)
    $xmm0 = COPY %4:fr64
    RET 0, $xmm0
  
  # End machine code for function test6.
  
  *** Bad machine code: Illegal virtual register for instruction ***
  - function:    test6
  - basic block: %bb.0 entry (0x26ed631e9a0)
  - instruction: %4:fr64 = MOVSDrm_alt killed %3:gr32, 8, killed %6:gr32, 0, $noreg :: (load 8 from constant-pool)
  - operand 3:   killed %6:gr32
  Expected a GR32_NOSP register, but got a GR32 register
  LLVM ERROR: Found 1 machine code errors.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D91339/new/

https://reviews.llvm.org/D91339