[PATCH] D91924: [X86] Have indirect calls take 64-bit operands in 64-bit modes

[Harald van Dijk via Phabricator via llvm-commits]

hvdijk added inline comments.


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Comment at: llvm/lib/Target/X86/X86FastISel.cpp:1092
+        BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
+                TII.get(TargetOpcode::SUBREG_TO_REG), ExtReg)
+            .addImm(0)
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craig.topper wrote:
> SUBREG_TO_REG is sort of an assertion that the upper 32 bits of the register are 0. This would require the producing instruction to definitely be a 32-bit operation and not some 64-bit operation that was just truncated to 32-bits. Is that really guaranteed here?
It took a bit of effort to find a test case to verify, but you're right, it's not. Even if `getRegForValue` will create a new instruction, and all hardware instructions that set a 32-bit register will implicitly zero the high 32 bits, `getRegForValue` need not create a hardware instruction, it may create a pseudo-instructions such as a subreg copy.


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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D91924/new/

https://reviews.llvm.org/D91924