[PATCH] D91924: [X86] Have indirect calls take 64-bit operands in 64-bit modes

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

Is there a test case?



================
Comment at: llvm/lib/Target/X86/X86FastISel.cpp:1092
+        BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
+                TII.get(TargetOpcode::SUBREG_TO_REG), ExtReg)
+            .addImm(0)
----------------
SUBREG_TO_REG is sort of an assertion that the upper 32 bits of the register are 0. This would require the producing instruction to definitely be a 32-bit operation and not some 64-bit operation that was just truncated to 32-bits. Is that really guaranteed here?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D91924/new/

https://reviews.llvm.org/D91924