[PATCH] D91876: [DAG] Move vselect(icmp_ult, -1, add(x,y)) -> uaddsat(x,y) to DAGCombine (PR40111)

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
RKSimon added reviewers: craig.topper, nemanjai, efriedma, spatel.
Herald added subscribers: ecnelises, steven.zhang, pengfei, hiraditya.
Herald added a project: LLVM.
RKSimon requested review of this revision.

Move the X86 VSELECT->UADDSAT fold to DAGCombiner - there's nothing target specific about these folds.

I think overall the SSE2 test diffs are relatively benign - its avoiding an extra constant load in exchange for an extra xor operation - there are extra register moves, which is annoying as all those operations should commute them away.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D91876

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/test/CodeGen/AArch64/sat-add.ll
  llvm/test/CodeGen/PowerPC/sat-add.ll
  llvm/test/CodeGen/X86/sat-add.ll

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