[PATCH] D91331: [NFC] Add hook for target to customize different legalization action according to the input type

Qing Shan Zhang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Nov 20 03:03:56 PST 2020


steven.zhang updated this revision to Diff 306638.
steven.zhang added a comment.
Herald added subscribers: pengfei, kbarton.

Thank you for Nemanjai's comments. I have changed it as suggested as it is indeed more clean, but with a different name.

I have removed all the places that call the LowerF128Call Craig mentioned for AArch64 and X86 and do it inside legalizer in an uniform way. However, I see some test change with this and I am not sure if it is expected change due to the different implementation of expanding the libcall. Can someone please help me double confirm this ?

I will rebase D91757 <https://reviews.llvm.org/D91757> for powerpc side change.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D91331/new/

https://reviews.llvm.org/D91331

Files:
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86ISelLowering.h
  llvm/test/CodeGen/AArch64/arm64-fp128.ll
  llvm/test/CodeGen/AArch64/vecreduce-fadd-legalization-strict.ll
  llvm/test/CodeGen/AArch64/vecreduce-fadd-legalization.ll
  llvm/test/CodeGen/AArch64/vecreduce-fmul-legalization-strict.ll
  llvm/test/CodeGen/X86/fp128-load.ll
  llvm/test/CodeGen/X86/scalar-fp-to-i32.ll
  llvm/test/CodeGen/X86/scalar-fp-to-i64.ll

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