[PATCH] D91729: [PowerPC] dyn_cast should be dyn_cast_or_null in MASSV pass
Masoud Ataei via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 19 10:14:15 PST 2020
masoud.ataei added inline comments.
================
Comment at: llvm/lib/Target/PowerPC/PPCLowerMASSVEntries.cpp:108
if (Constant *Exp = dyn_cast<Constant>(CI->getArgOperand(1)))
- if (ConstantFP *CFP = dyn_cast<ConstantFP>(Exp->getSplatValue())) {
+ if (ConstantFP *CFP = dyn_cast_or_null<ConstantFP>(Exp->getSplatValue())) {
// If the argument is 0.75 or 0.25 it is cheaper to turn it into pow
----------------
steven.zhang wrote:
> It seems that some of the test change is not relative with this.(i.e. rename the func name) And the only test change I can imagine is that, some case that we hit ice before now it is passed. That is, if Exp->getSplatValue() return null, dyn_cast will hit ice before. But I didn't see such kind of test.
I agree the rename the func name in the test is irrelevant to this change but the one with
```
@__powd2_massv(<2 x double> %wide.load, <2 x double> <double 7.700000e-01, double 7.600000e-01>)
```
and similar ones that tests the two slots of the second vector double has non-equal constants are relevant. For example in this test `Exp->getSplatValue()` returns nullptr which is handled here.
================
Comment at: llvm/test/CodeGen/PowerPC/pow_massv_075_025exp.ll:74
+ %wide.load = load <2 x double>, <2 x double>* %0, align 8
+ %1 = call ninf afn nsz <2 x double> @__powd2_massv(<2 x double> %wide.load, <2 x double> <double 7.700000e-01, double 7.600000e-01>)
+ %2 = bitcast double* %next.gep to <2 x double>*
----------------
Two slots of the second vector double in __powd2_massv arguments has non-equal constants.
================
Comment at: llvm/test/CodeGen/PowerPC/pow_massv_075_025exp.ll:100
+ %wide.load = load <2 x double>, <2 x double>* %0, align 8
+ %1 = call ninf afn nsz <2 x double> @__powd2_massv(<2 x double> %wide.load, <2 x double> <double 7.700000e-01, double 7.500000e-01>)
+ %2 = bitcast double* %next.gep to <2 x double>*
----------------
Two slots of the second vector double in __powd2_massv arguments has non-equal constants.
================
Comment at: llvm/test/CodeGen/PowerPC/pow_massv_075_025exp.ll:126
+ %wide.load = load <2 x double>, <2 x double>* %0, align 8
+ %1 = call ninf afn nsz <2 x double> @__powd2_massv(<2 x double> %wide.load, <2 x double> <double 7.700000e-01, double 2.500000e-01>)
+ %2 = bitcast double* %next.gep to <2 x double>*
----------------
Two slots of the second vector double in __powd2_massv arguments has non-equal constants.
================
Comment at: llvm/test/CodeGen/PowerPC/powf_massv_075_025exp.ll:74
+ %wide.load = load <4 x float>, <4 x float>* %0, align 4
+ %1 = call ninf afn nsz <4 x float> @__powf4_massv(<4 x float> %wide.load, <4 x float> <float 0x3FE861EB80000000, float 0x3FE871EB80000000, float 0x3FE851EB80000000, float 0x3FE851EB80000000>)
+ %2 = bitcast float* %next.gep to <4 x float>*
----------------
Four slots of the second vector float in __powf4_massv arguments has non-equal constants.
================
Comment at: llvm/test/CodeGen/PowerPC/powf_massv_075_025exp.ll:100
+ %wide.load = load <4 x float>, <4 x float>* %0, align 4
+ %1 = call ninf afn nsz <4 x float> @__powf4_massv(<4 x float> %wide.load, <4 x float> <float 7.500000e-01, float 7.500000e-01, float 7.500000e-01, float 0x3FE851EB80000000>)
+ %2 = bitcast float* %next.gep to <4 x float>*
----------------
Four slots of the second vector float in __powf4_massv arguments has non-equal constants.
================
Comment at: llvm/test/CodeGen/PowerPC/powf_massv_075_025exp.ll:126
+ %wide.load = load <4 x float>, <4 x float>* %0, align 4
+ %1 = call ninf afn nsz <4 x float> @__powf4_massv(<4 x float> %wide.load, <4 x float> <float 0x3FE851EB80000000, float 2.500000e-01, float 0x3FE851EB80000000, float 2.500000e-01>)
+ %2 = bitcast float* %next.gep to <4 x float>*
----------------
Four slots of the second vector float in __powf4_massv arguments has non-equal constants.
Repository:
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CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D91729/new/
https://reviews.llvm.org/D91729
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