[PATCH] D91764: [AArch64] Add codegen for Armv8.3 Load-AcquirePC instructions

[Alex James via Phabricator via llvm-commits]

al3xtjames created this revision.
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Armv8.3 introduced support for Load-AcquirePC instructions to support
the weaker Release Consistency processor consistent (RCpc) model, which
corresponds to the Acquire/Release semantics used in LLVM. In
constrast, the existing Load-Acquire instructions in Armv8 support the
Release Consistency sequentially consistent (RCsc) model, which
corresponds to the SequentiallyConsistent semantics used in LLVM.

Use the Load-AcquirePC instructions for atomic loads with acquire
semantics when supported.

Please let me know if there's a better way to make these changes to
AArch64InstrAtomics.td, I'm not too familiar with TableGen.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D91764

Files:
  llvm/lib/Target/AArch64/AArch64InstrAtomics.td
  llvm/test/CodeGen/AArch64/atomics-rcpc.ll

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