[PATCH] D91735: [PowerPC] Allow a '%' prefix for registers in CFI directives
Bill Wendling via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 18 12:41:08 PST 2020
void created this revision.
void added reviewers: PowerPC, hfinkel.
Herald added subscribers: llvm-commits, shchenz, kbarton, hiraditya, nemanjai.
Herald added a project: LLVM.
void requested review of this revision.
Clang generates a '%' prefix for some registers in CFI directives. E.g.
".cfi_register lr, r12" becomes ".cfi_register lr, %r12" after
processing.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D91735
Files:
llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
llvm/test/MC/PowerPC/cfi-register-directive-parse.s
Index: llvm/test/MC/PowerPC/cfi-register-directive-parse.s
===================================================================
--- /dev/null
+++ llvm/test/MC/PowerPC/cfi-register-directive-parse.s
@@ -0,0 +1,19 @@
+# RUN: llvm-mc -triple powerpc64le-unknown-unknown %s 2>&1 | FileCheck %s
+
+# Test that CFI directives can handle registers with a '%' prefix.
+
+# CHECK-LABEL: __test1
+# CHECK: .cfi_startproc
+# CHECK-NEXT: mflr 12
+# CHECK-NEXT: .cfi_register lr, r12
+# CHECK-NEXT: blr
+# CHECK-NEXT: .cfi_endproc
+
+ .text
+ .globl __test1
+__test1:
+ .cfi_startproc
+ mflr %r12
+ .cfi_register lr,%r12
+ blr
+ .cfi_endproc
Index: llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
===================================================================
--- llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
+++ llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
@@ -1245,6 +1245,10 @@
OperandMatchResultTy PPCAsmParser::tryParseRegister(unsigned &RegNo,
SMLoc &StartLoc,
SMLoc &EndLoc) {
+ // CFI directives may have registers with and without a '%' prefix.
+ if (getLexer().getKind() == AsmToken::Percent)
+ getParser().Lex(); // Eat the '%'.
+
const AsmToken &Tok = getParser().getTok();
StartLoc = Tok.getLoc();
EndLoc = Tok.getEndLoc();
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