[llvm] f45c052 - Fix unused variables in release build
Mikhail Goncharov via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 18 06:18:48 PST 2020
Author: Mikhail Goncharov
Date: 2020-11-18T15:18:31+01:00
New Revision: f45c052c9e62a0482d80059ad1eddd8f36ed40ca
URL: https://github.com/llvm/llvm-project/commit/f45c052c9e62a0482d80059ad1eddd8f36ed40ca
DIFF: https://github.com/llvm/llvm-project/commit/f45c052c9e62a0482d80059ad1eddd8f36ed40ca.diff
LOG: Fix unused variables in release build
Differential Revision: https://reviews.llvm.org/D91705
Added:
Modified:
llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp b/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
index 6ed6260c05e4..9f6f6d03aad5 100644
--- a/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
+++ b/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
@@ -1569,7 +1569,7 @@ void ARMLowOverheadLoops::ConvertVPTBlocks(LowOverheadLoop &LoLoop) {
auto Next = ++MachineBasicBlock::iterator(VPST);
assert(getVPTInstrPredicate(*Next) != ARMVCC::None &&
"The instruction after a VPST must be predicated");
-
+ (void)Next;
MachineInstr *VprDef = RDA->getUniqueReachingMIDef(VPST, ARM::VPR);
if (VprDef && VCMPOpcodeToVPT(VprDef->getOpcode()) &&
!LoLoop.ToRemove.contains(VprDef)) {
@@ -1578,13 +1578,11 @@ void ARMLowOverheadLoops::ConvertVPTBlocks(LowOverheadLoop &LoLoop) {
// the same values at the VPST
if (RDA->hasSameReachingDef(VCMP, VPST, VCMP->getOperand(1).getReg()) &&
RDA->hasSameReachingDef(VCMP, VPST, VCMP->getOperand(2).getReg())) {
- bool IntermediateInstrsUseVPR =
- std::any_of(++MachineBasicBlock::iterator(VCMP),
- MachineBasicBlock::iterator(VPST), hasVPRUse);
// If the instruction after the VCMP is predicated then a
diff erent
// code path is expected to have merged the VCMP and VPST already.
// This assertion protects against changes to that behaviour
- assert(!IntermediateInstrsUseVPR &&
+ assert(!std::any_of(++MachineBasicBlock::iterator(VCMP),
+ MachineBasicBlock::iterator(VPST), hasVPRUse) &&
"Instructions between the VCMP and VPST are not expected to "
"be predicated");
ReplaceVCMPWithVPT(VCMP, VPST);
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