[PATCH] D90441: [X86] Add support for vex, vex2, vex3, and evex for MASM

[LiuChen via Phabricator via llvm-commits]

LiuChen3 marked an inline comment as done.
LiuChen3 added a comment.

> It allows more than two, right? like `{vex}{vex2}{vex3} instruction`. I think it should be a bug for att.

Yes, My previous statement is incorrect, it should be ‘two more’. Thanks for your correction.
We might need another patch to fix it.



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Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:3079
+      if (ForcedVEXEncoding != VEXEncoding_Default) {
+        if (getLexer().isNot(AsmToken::Identifier))
+          return Error(Parser.getTok().getLoc(), "Expected identifier");
----------------
pengfei wrote:
> Do you need to eat the prefix here?
No. The prefix has been eat.
For example: vex vcvtps2pd xmm0, xmm1 .
Current token is 'vex' and the rest is 'vcvtps2pd xmm0, xmm1'. 'vcvtps2pd' is the next token which will be eat in line 3082.


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https://reviews.llvm.org/D90441