[llvm] a461e76 - [MachineScheduler] Inform pass infra of post-ra scheduler's dependencies

[Jon Roelofs via llvm-commits]

Author: Jon Roelofs
Date: 2020-11-17T10:56:12-08:00
New Revision: a461e76b6f973d3f40944b83a46defba0c136777

URL: https://github.com/llvm/llvm-project/commit/a461e76b6f973d3f40944b83a46defba0c136777
DIFF: https://github.com/llvm/llvm-project/commit/a461e76b6f973d3f40944b83a46defba0c136777.diff

LOG: [MachineScheduler] Inform pass infra of post-ra scheduler's dependencies

Differential Revision: https://reviews.llvm.org/D91561

Added: 
    

Modified: 
    llvm/lib/CodeGen/MachineScheduler.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp
index 256628a179ae..5843f84b2a91 100644
--- a/llvm/lib/CodeGen/MachineScheduler.cpp
+++ b/llvm/lib/CodeGen/MachineScheduler.cpp
@@ -240,8 +240,13 @@ char PostMachineScheduler::ID = 0;
 
 char &llvm::PostMachineSchedulerID = PostMachineScheduler::ID;
 
-INITIALIZE_PASS(PostMachineScheduler, "postmisched",
-                "PostRA Machine Instruction Scheduler", false, false)
+INITIALIZE_PASS_BEGIN(PostMachineScheduler, "postmisched",
+                      "PostRA Machine Instruction Scheduler", false, false)
+INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
+INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
+INITIALIZE_PASS_END(PostMachineScheduler, "postmisched",
+                    "PostRA Machine Instruction Scheduler", false, false)
 
 PostMachineScheduler::PostMachineScheduler() : MachineSchedulerBase(ID) {
   initializePostMachineSchedulerPass(*PassRegistry::getPassRegistry());