[llvm] e741fa5 - [X86] vec_fabs.ll - replace X32 check prefix with X86. NFC.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 17 09:39:32 PST 2020
Author: Simon Pilgrim
Date: 2020-11-17T17:37:09Z
New Revision: e741fa5c92bcfcf49b76382c18eec748387ad91b
URL: https://github.com/llvm/llvm-project/commit/e741fa5c92bcfcf49b76382c18eec748387ad91b
DIFF: https://github.com/llvm/llvm-project/commit/e741fa5c92bcfcf49b76382c18eec748387ad91b.diff
LOG: [X86] vec_fabs.ll - replace X32 check prefix with X86. NFC.
We typically use X32 for gnux32 triples
Added:
Modified:
llvm/test/CodeGen/X86/vec_fabs.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/vec_fabs.ll b/llvm/test/CodeGen/X86/vec_fabs.ll
index fab480fe7d2f..e866ef23a5b9 100644
--- a/llvm/test/CodeGen/X86/vec_fabs.ll
+++ b/llvm/test/CodeGen/X86/vec_fabs.ll
@@ -1,16 +1,16 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X32 --check-prefix=X32_AVX
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=X32 --check-prefix=X32_AVX512VL
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefix=X32 --check-prefix=X32_AVX512VLDQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64 --check-prefix=X64_AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=X64 --check-prefix=X64_AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefix=X64 --check-prefix=X64_AVX512VLDQ
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X86 --check-prefix=X86-AVX
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=X86 --check-prefix=X86-AVX512VL
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefix=X86 --check-prefix=X86-AVX512VLDQ
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX512VL
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX512VLDQ
define <2 x double> @fabs_v2f64(<2 x double> %p) {
-; X32-LABEL: fabs_v2f64:
-; X32: # %bb.0:
-; X32-NEXT: vandps {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-NEXT: retl
+; X86-LABEL: fabs_v2f64:
+; X86: # %bb.0:
+; X86-NEXT: vandps {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-NEXT: retl
;
; X64-LABEL: fabs_v2f64:
; X64: # %bb.0:
@@ -22,183 +22,183 @@ define <2 x double> @fabs_v2f64(<2 x double> %p) {
declare <2 x double> @llvm.fabs.v2f64(<2 x double> %p)
define <4 x float> @fabs_v4f32(<4 x float> %p) {
-; X32_AVX-LABEL: fabs_v4f32:
-; X32_AVX: # %bb.0:
-; X32_AVX-NEXT: vandps {{\.LCPI.*}}, %xmm0, %xmm0
-; X32_AVX-NEXT: retl
+; X86-AVX-LABEL: fabs_v4f32:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vandps {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
;
-; X32_AVX512VL-LABEL: fabs_v4f32:
-; X32_AVX512VL: # %bb.0:
-; X32_AVX512VL-NEXT: vpandd {{\.LCPI.*}}{1to4}, %xmm0, %xmm0
-; X32_AVX512VL-NEXT: retl
+; X86-AVX512VL-LABEL: fabs_v4f32:
+; X86-AVX512VL: # %bb.0:
+; X86-AVX512VL-NEXT: vpandd {{\.LCPI.*}}{1to4}, %xmm0, %xmm0
+; X86-AVX512VL-NEXT: retl
;
-; X32_AVX512VLDQ-LABEL: fabs_v4f32:
-; X32_AVX512VLDQ: # %bb.0:
-; X32_AVX512VLDQ-NEXT: vandps {{\.LCPI.*}}{1to4}, %xmm0, %xmm0
-; X32_AVX512VLDQ-NEXT: retl
+; X86-AVX512VLDQ-LABEL: fabs_v4f32:
+; X86-AVX512VLDQ: # %bb.0:
+; X86-AVX512VLDQ-NEXT: vandps {{\.LCPI.*}}{1to4}, %xmm0, %xmm0
+; X86-AVX512VLDQ-NEXT: retl
;
-; X64_AVX-LABEL: fabs_v4f32:
-; X64_AVX: # %bb.0:
-; X64_AVX-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0
-; X64_AVX-NEXT: retq
+; X64-AVX-LABEL: fabs_v4f32:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: retq
;
-; X64_AVX512VL-LABEL: fabs_v4f32:
-; X64_AVX512VL: # %bb.0:
-; X64_AVX512VL-NEXT: vpandd {{.*}}(%rip){1to4}, %xmm0, %xmm0
-; X64_AVX512VL-NEXT: retq
+; X64-AVX512VL-LABEL: fabs_v4f32:
+; X64-AVX512VL: # %bb.0:
+; X64-AVX512VL-NEXT: vpandd {{.*}}(%rip){1to4}, %xmm0, %xmm0
+; X64-AVX512VL-NEXT: retq
;
-; X64_AVX512VLDQ-LABEL: fabs_v4f32:
-; X64_AVX512VLDQ: # %bb.0:
-; X64_AVX512VLDQ-NEXT: vandps {{.*}}(%rip){1to4}, %xmm0, %xmm0
-; X64_AVX512VLDQ-NEXT: retq
+; X64-AVX512VLDQ-LABEL: fabs_v4f32:
+; X64-AVX512VLDQ: # %bb.0:
+; X64-AVX512VLDQ-NEXT: vandps {{.*}}(%rip){1to4}, %xmm0, %xmm0
+; X64-AVX512VLDQ-NEXT: retq
%t = call <4 x float> @llvm.fabs.v4f32(<4 x float> %p)
ret <4 x float> %t
}
declare <4 x float> @llvm.fabs.v4f32(<4 x float> %p)
define <4 x double> @fabs_v4f64(<4 x double> %p) {
-; X32_AVX-LABEL: fabs_v4f64:
-; X32_AVX: # %bb.0:
-; X32_AVX-NEXT: vandps {{\.LCPI.*}}, %ymm0, %ymm0
-; X32_AVX-NEXT: retl
+; X86-AVX-LABEL: fabs_v4f64:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vandps {{\.LCPI.*}}, %ymm0, %ymm0
+; X86-AVX-NEXT: retl
;
-; X32_AVX512VL-LABEL: fabs_v4f64:
-; X32_AVX512VL: # %bb.0:
-; X32_AVX512VL-NEXT: vpandq {{\.LCPI.*}}{1to4}, %ymm0, %ymm0
-; X32_AVX512VL-NEXT: retl
+; X86-AVX512VL-LABEL: fabs_v4f64:
+; X86-AVX512VL: # %bb.0:
+; X86-AVX512VL-NEXT: vpandq {{\.LCPI.*}}{1to4}, %ymm0, %ymm0
+; X86-AVX512VL-NEXT: retl
;
-; X32_AVX512VLDQ-LABEL: fabs_v4f64:
-; X32_AVX512VLDQ: # %bb.0:
-; X32_AVX512VLDQ-NEXT: vandpd {{\.LCPI.*}}{1to4}, %ymm0, %ymm0
-; X32_AVX512VLDQ-NEXT: retl
+; X86-AVX512VLDQ-LABEL: fabs_v4f64:
+; X86-AVX512VLDQ: # %bb.0:
+; X86-AVX512VLDQ-NEXT: vandpd {{\.LCPI.*}}{1to4}, %ymm0, %ymm0
+; X86-AVX512VLDQ-NEXT: retl
;
-; X64_AVX-LABEL: fabs_v4f64:
-; X64_AVX: # %bb.0:
-; X64_AVX-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0
-; X64_AVX-NEXT: retq
+; X64-AVX-LABEL: fabs_v4f64:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0
+; X64-AVX-NEXT: retq
;
-; X64_AVX512VL-LABEL: fabs_v4f64:
-; X64_AVX512VL: # %bb.0:
-; X64_AVX512VL-NEXT: vpandq {{.*}}(%rip){1to4}, %ymm0, %ymm0
-; X64_AVX512VL-NEXT: retq
+; X64-AVX512VL-LABEL: fabs_v4f64:
+; X64-AVX512VL: # %bb.0:
+; X64-AVX512VL-NEXT: vpandq {{.*}}(%rip){1to4}, %ymm0, %ymm0
+; X64-AVX512VL-NEXT: retq
;
-; X64_AVX512VLDQ-LABEL: fabs_v4f64:
-; X64_AVX512VLDQ: # %bb.0:
-; X64_AVX512VLDQ-NEXT: vandpd {{.*}}(%rip){1to4}, %ymm0, %ymm0
-; X64_AVX512VLDQ-NEXT: retq
+; X64-AVX512VLDQ-LABEL: fabs_v4f64:
+; X64-AVX512VLDQ: # %bb.0:
+; X64-AVX512VLDQ-NEXT: vandpd {{.*}}(%rip){1to4}, %ymm0, %ymm0
+; X64-AVX512VLDQ-NEXT: retq
%t = call <4 x double> @llvm.fabs.v4f64(<4 x double> %p)
ret <4 x double> %t
}
declare <4 x double> @llvm.fabs.v4f64(<4 x double> %p)
define <8 x float> @fabs_v8f32(<8 x float> %p) {
-; X32_AVX-LABEL: fabs_v8f32:
-; X32_AVX: # %bb.0:
-; X32_AVX-NEXT: vandps {{\.LCPI.*}}, %ymm0, %ymm0
-; X32_AVX-NEXT: retl
+; X86-AVX-LABEL: fabs_v8f32:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vandps {{\.LCPI.*}}, %ymm0, %ymm0
+; X86-AVX-NEXT: retl
;
-; X32_AVX512VL-LABEL: fabs_v8f32:
-; X32_AVX512VL: # %bb.0:
-; X32_AVX512VL-NEXT: vpandd {{\.LCPI.*}}{1to8}, %ymm0, %ymm0
-; X32_AVX512VL-NEXT: retl
+; X86-AVX512VL-LABEL: fabs_v8f32:
+; X86-AVX512VL: # %bb.0:
+; X86-AVX512VL-NEXT: vpandd {{\.LCPI.*}}{1to8}, %ymm0, %ymm0
+; X86-AVX512VL-NEXT: retl
;
-; X32_AVX512VLDQ-LABEL: fabs_v8f32:
-; X32_AVX512VLDQ: # %bb.0:
-; X32_AVX512VLDQ-NEXT: vandps {{\.LCPI.*}}{1to8}, %ymm0, %ymm0
-; X32_AVX512VLDQ-NEXT: retl
+; X86-AVX512VLDQ-LABEL: fabs_v8f32:
+; X86-AVX512VLDQ: # %bb.0:
+; X86-AVX512VLDQ-NEXT: vandps {{\.LCPI.*}}{1to8}, %ymm0, %ymm0
+; X86-AVX512VLDQ-NEXT: retl
;
-; X64_AVX-LABEL: fabs_v8f32:
-; X64_AVX: # %bb.0:
-; X64_AVX-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0
-; X64_AVX-NEXT: retq
+; X64-AVX-LABEL: fabs_v8f32:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0
+; X64-AVX-NEXT: retq
;
-; X64_AVX512VL-LABEL: fabs_v8f32:
-; X64_AVX512VL: # %bb.0:
-; X64_AVX512VL-NEXT: vpandd {{.*}}(%rip){1to8}, %ymm0, %ymm0
-; X64_AVX512VL-NEXT: retq
+; X64-AVX512VL-LABEL: fabs_v8f32:
+; X64-AVX512VL: # %bb.0:
+; X64-AVX512VL-NEXT: vpandd {{.*}}(%rip){1to8}, %ymm0, %ymm0
+; X64-AVX512VL-NEXT: retq
;
-; X64_AVX512VLDQ-LABEL: fabs_v8f32:
-; X64_AVX512VLDQ: # %bb.0:
-; X64_AVX512VLDQ-NEXT: vandps {{.*}}(%rip){1to8}, %ymm0, %ymm0
-; X64_AVX512VLDQ-NEXT: retq
+; X64-AVX512VLDQ-LABEL: fabs_v8f32:
+; X64-AVX512VLDQ: # %bb.0:
+; X64-AVX512VLDQ-NEXT: vandps {{.*}}(%rip){1to8}, %ymm0, %ymm0
+; X64-AVX512VLDQ-NEXT: retq
%t = call <8 x float> @llvm.fabs.v8f32(<8 x float> %p)
ret <8 x float> %t
}
declare <8 x float> @llvm.fabs.v8f32(<8 x float> %p)
define <8 x double> @fabs_v8f64(<8 x double> %p) {
-; X32_AVX-LABEL: fabs_v8f64:
-; X32_AVX: # %bb.0:
-; X32_AVX-NEXT: vmovaps {{.*#+}} ymm2 = [NaN,NaN,NaN,NaN]
-; X32_AVX-NEXT: vandps %ymm2, %ymm0, %ymm0
-; X32_AVX-NEXT: vandps %ymm2, %ymm1, %ymm1
-; X32_AVX-NEXT: retl
+; X86-AVX-LABEL: fabs_v8f64:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vmovaps {{.*#+}} ymm2 = [NaN,NaN,NaN,NaN]
+; X86-AVX-NEXT: vandps %ymm2, %ymm0, %ymm0
+; X86-AVX-NEXT: vandps %ymm2, %ymm1, %ymm1
+; X86-AVX-NEXT: retl
;
-; X32_AVX512VL-LABEL: fabs_v8f64:
-; X32_AVX512VL: # %bb.0:
-; X32_AVX512VL-NEXT: vpandq {{\.LCPI.*}}{1to8}, %zmm0, %zmm0
-; X32_AVX512VL-NEXT: retl
+; X86-AVX512VL-LABEL: fabs_v8f64:
+; X86-AVX512VL: # %bb.0:
+; X86-AVX512VL-NEXT: vpandq {{\.LCPI.*}}{1to8}, %zmm0, %zmm0
+; X86-AVX512VL-NEXT: retl
;
-; X32_AVX512VLDQ-LABEL: fabs_v8f64:
-; X32_AVX512VLDQ: # %bb.0:
-; X32_AVX512VLDQ-NEXT: vandpd {{\.LCPI.*}}{1to8}, %zmm0, %zmm0
-; X32_AVX512VLDQ-NEXT: retl
+; X86-AVX512VLDQ-LABEL: fabs_v8f64:
+; X86-AVX512VLDQ: # %bb.0:
+; X86-AVX512VLDQ-NEXT: vandpd {{\.LCPI.*}}{1to8}, %zmm0, %zmm0
+; X86-AVX512VLDQ-NEXT: retl
;
-; X64_AVX-LABEL: fabs_v8f64:
-; X64_AVX: # %bb.0:
-; X64_AVX-NEXT: vmovaps {{.*#+}} ymm2 = [NaN,NaN,NaN,NaN]
-; X64_AVX-NEXT: vandps %ymm2, %ymm0, %ymm0
-; X64_AVX-NEXT: vandps %ymm2, %ymm1, %ymm1
-; X64_AVX-NEXT: retq
+; X64-AVX-LABEL: fabs_v8f64:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vmovaps {{.*#+}} ymm2 = [NaN,NaN,NaN,NaN]
+; X64-AVX-NEXT: vandps %ymm2, %ymm0, %ymm0
+; X64-AVX-NEXT: vandps %ymm2, %ymm1, %ymm1
+; X64-AVX-NEXT: retq
;
-; X64_AVX512VL-LABEL: fabs_v8f64:
-; X64_AVX512VL: # %bb.0:
-; X64_AVX512VL-NEXT: vpandq {{.*}}(%rip){1to8}, %zmm0, %zmm0
-; X64_AVX512VL-NEXT: retq
+; X64-AVX512VL-LABEL: fabs_v8f64:
+; X64-AVX512VL: # %bb.0:
+; X64-AVX512VL-NEXT: vpandq {{.*}}(%rip){1to8}, %zmm0, %zmm0
+; X64-AVX512VL-NEXT: retq
;
-; X64_AVX512VLDQ-LABEL: fabs_v8f64:
-; X64_AVX512VLDQ: # %bb.0:
-; X64_AVX512VLDQ-NEXT: vandpd {{.*}}(%rip){1to8}, %zmm0, %zmm0
-; X64_AVX512VLDQ-NEXT: retq
+; X64-AVX512VLDQ-LABEL: fabs_v8f64:
+; X64-AVX512VLDQ: # %bb.0:
+; X64-AVX512VLDQ-NEXT: vandpd {{.*}}(%rip){1to8}, %zmm0, %zmm0
+; X64-AVX512VLDQ-NEXT: retq
%t = call <8 x double> @llvm.fabs.v8f64(<8 x double> %p)
ret <8 x double> %t
}
declare <8 x double> @llvm.fabs.v8f64(<8 x double> %p)
define <16 x float> @fabs_v16f32(<16 x float> %p) {
-; X32_AVX-LABEL: fabs_v16f32:
-; X32_AVX: # %bb.0:
-; X32_AVX-NEXT: vmovaps {{.*#+}} ymm2 = [NaN,NaN,NaN,NaN,NaN,NaN,NaN,NaN]
-; X32_AVX-NEXT: vandps %ymm2, %ymm0, %ymm0
-; X32_AVX-NEXT: vandps %ymm2, %ymm1, %ymm1
-; X32_AVX-NEXT: retl
+; X86-AVX-LABEL: fabs_v16f32:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vmovaps {{.*#+}} ymm2 = [NaN,NaN,NaN,NaN,NaN,NaN,NaN,NaN]
+; X86-AVX-NEXT: vandps %ymm2, %ymm0, %ymm0
+; X86-AVX-NEXT: vandps %ymm2, %ymm1, %ymm1
+; X86-AVX-NEXT: retl
;
-; X32_AVX512VL-LABEL: fabs_v16f32:
-; X32_AVX512VL: # %bb.0:
-; X32_AVX512VL-NEXT: vpandd {{\.LCPI.*}}{1to16}, %zmm0, %zmm0
-; X32_AVX512VL-NEXT: retl
+; X86-AVX512VL-LABEL: fabs_v16f32:
+; X86-AVX512VL: # %bb.0:
+; X86-AVX512VL-NEXT: vpandd {{\.LCPI.*}}{1to16}, %zmm0, %zmm0
+; X86-AVX512VL-NEXT: retl
;
-; X32_AVX512VLDQ-LABEL: fabs_v16f32:
-; X32_AVX512VLDQ: # %bb.0:
-; X32_AVX512VLDQ-NEXT: vandps {{\.LCPI.*}}{1to16}, %zmm0, %zmm0
-; X32_AVX512VLDQ-NEXT: retl
+; X86-AVX512VLDQ-LABEL: fabs_v16f32:
+; X86-AVX512VLDQ: # %bb.0:
+; X86-AVX512VLDQ-NEXT: vandps {{\.LCPI.*}}{1to16}, %zmm0, %zmm0
+; X86-AVX512VLDQ-NEXT: retl
;
-; X64_AVX-LABEL: fabs_v16f32:
-; X64_AVX: # %bb.0:
-; X64_AVX-NEXT: vmovaps {{.*#+}} ymm2 = [NaN,NaN,NaN,NaN,NaN,NaN,NaN,NaN]
-; X64_AVX-NEXT: vandps %ymm2, %ymm0, %ymm0
-; X64_AVX-NEXT: vandps %ymm2, %ymm1, %ymm1
-; X64_AVX-NEXT: retq
+; X64-AVX-LABEL: fabs_v16f32:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vmovaps {{.*#+}} ymm2 = [NaN,NaN,NaN,NaN,NaN,NaN,NaN,NaN]
+; X64-AVX-NEXT: vandps %ymm2, %ymm0, %ymm0
+; X64-AVX-NEXT: vandps %ymm2, %ymm1, %ymm1
+; X64-AVX-NEXT: retq
;
-; X64_AVX512VL-LABEL: fabs_v16f32:
-; X64_AVX512VL: # %bb.0:
-; X64_AVX512VL-NEXT: vpandd {{.*}}(%rip){1to16}, %zmm0, %zmm0
-; X64_AVX512VL-NEXT: retq
+; X64-AVX512VL-LABEL: fabs_v16f32:
+; X64-AVX512VL: # %bb.0:
+; X64-AVX512VL-NEXT: vpandd {{.*}}(%rip){1to16}, %zmm0, %zmm0
+; X64-AVX512VL-NEXT: retq
;
-; X64_AVX512VLDQ-LABEL: fabs_v16f32:
-; X64_AVX512VLDQ: # %bb.0:
-; X64_AVX512VLDQ-NEXT: vandps {{.*}}(%rip){1to16}, %zmm0, %zmm0
-; X64_AVX512VLDQ-NEXT: retq
+; X64-AVX512VLDQ-LABEL: fabs_v16f32:
+; X64-AVX512VLDQ: # %bb.0:
+; X64-AVX512VLDQ-NEXT: vandps {{.*}}(%rip){1to16}, %zmm0, %zmm0
+; X64-AVX512VLDQ-NEXT: retq
%t = call <16 x float> @llvm.fabs.v16f32(<16 x float> %p)
ret <16 x float> %t
}
@@ -220,11 +220,11 @@ declare <16 x float> @llvm.fabs.v16f32(<16 x float> %p)
; mov (put constant value in return register)
define i64 @fabs_v2f32_1() {
-; X32-LABEL: fabs_v2f32_1:
-; X32: # %bb.0:
-; X32-NEXT: xorl %eax, %eax
-; X32-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF
-; X32-NEXT: retl
+; X86-LABEL: fabs_v2f32_1:
+; X86: # %bb.0:
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF
+; X86-NEXT: retl
;
; X64-LABEL: fabs_v2f32_1:
; X64: # %bb.0:
@@ -237,11 +237,11 @@ define i64 @fabs_v2f32_1() {
}
define i64 @fabs_v2f32_2() {
-; X32-LABEL: fabs_v2f32_2:
-; X32: # %bb.0:
-; X32-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X32-NEXT: xorl %edx, %edx
-; X32-NEXT: retl
+; X86-LABEL: fabs_v2f32_2:
+; X86: # %bb.0:
+; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-NEXT: xorl %edx, %edx
+; X86-NEXT: retl
;
; X64-LABEL: fabs_v2f32_2:
; X64: # %bb.0:
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