[llvm] 53fba9d - [X86] nontemporal.ll - replace X32 check prefix with X86. NFC.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 17 08:17:16 PST 2020
Author: Simon Pilgrim
Date: 2020-11-17T16:16:51Z
New Revision: 53fba9d9d30307bac3d1ce31e39b0fccc13bed80
URL: https://github.com/llvm/llvm-project/commit/53fba9d9d30307bac3d1ce31e39b0fccc13bed80
DIFF: https://github.com/llvm/llvm-project/commit/53fba9d9d30307bac3d1ce31e39b0fccc13bed80.diff
LOG: [X86] nontemporal.ll - replace X32 check prefix with X86. NFC.
We typically use X32 for gnux32 triples
Added:
Modified:
llvm/test/CodeGen/X86/nontemporal.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/nontemporal.ll b/llvm/test/CodeGen/X86/nontemporal.ll
index 472c3e4774cc..104a90a6283f 100644
--- a/llvm/test/CodeGen/X86/nontemporal.ll
+++ b/llvm/test/CodeGen/X86/nontemporal.ll
@@ -1,93 +1,93 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X32-SSE
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X32-AVX
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X86-AVX
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64-SSE
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64-AVX
define i32 @f(<4 x float> %A, i8* %B, <2 x double> %C, i32 %D, <2 x i64> %E, <4 x i32> %F, <8 x i16> %G, <16 x i8> %H, i64 %I, i32* %loadptr) nounwind {
-; X32-SSE-LABEL: f:
-; X32-SSE: # %bb.0:
-; X32-SSE-NEXT: pushl %ebp
-; X32-SSE-NEXT: movl %esp, %ebp
-; X32-SSE-NEXT: pushl %esi
-; X32-SSE-NEXT: andl $-16, %esp
-; X32-SSE-NEXT: subl $16, %esp
-; X32-SSE-NEXT: movsd {{.*#+}} xmm3 = mem[0],zero
-; X32-SSE-NEXT: movl 12(%ebp), %ecx
-; X32-SSE-NEXT: movdqa 56(%ebp), %xmm4
-; X32-SSE-NEXT: movdqa 40(%ebp), %xmm5
-; X32-SSE-NEXT: movdqa 24(%ebp), %xmm6
-; X32-SSE-NEXT: movl 8(%ebp), %esi
-; X32-SSE-NEXT: movl 80(%ebp), %edx
-; X32-SSE-NEXT: movl (%edx), %eax
-; X32-SSE-NEXT: addps {{\.LCPI.*}}, %xmm0
-; X32-SSE-NEXT: movntps %xmm0, (%esi)
-; X32-SSE-NEXT: paddq {{\.LCPI.*}}, %xmm2
-; X32-SSE-NEXT: addl (%edx), %eax
-; X32-SSE-NEXT: movntdq %xmm2, (%esi)
-; X32-SSE-NEXT: addpd {{\.LCPI.*}}, %xmm1
-; X32-SSE-NEXT: addl (%edx), %eax
-; X32-SSE-NEXT: movntpd %xmm1, (%esi)
-; X32-SSE-NEXT: paddd {{\.LCPI.*}}, %xmm6
-; X32-SSE-NEXT: addl (%edx), %eax
-; X32-SSE-NEXT: movntdq %xmm6, (%esi)
-; X32-SSE-NEXT: paddw {{\.LCPI.*}}, %xmm5
-; X32-SSE-NEXT: addl (%edx), %eax
-; X32-SSE-NEXT: movntdq %xmm5, (%esi)
-; X32-SSE-NEXT: paddb {{\.LCPI.*}}, %xmm4
-; X32-SSE-NEXT: addl (%edx), %eax
-; X32-SSE-NEXT: movntdq %xmm4, (%esi)
-; X32-SSE-NEXT: addl (%edx), %eax
-; X32-SSE-NEXT: movntil %ecx, (%esi)
-; X32-SSE-NEXT: addl (%edx), %eax
-; X32-SSE-NEXT: movsd %xmm3, (%esi)
-; X32-SSE-NEXT: addl (%edx), %eax
-; X32-SSE-NEXT: leal -4(%ebp), %esp
-; X32-SSE-NEXT: popl %esi
-; X32-SSE-NEXT: popl %ebp
-; X32-SSE-NEXT: retl
+; X86-SSE-LABEL: f:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: pushl %esi
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: movsd {{.*#+}} xmm3 = mem[0],zero
+; X86-SSE-NEXT: movl 12(%ebp), %ecx
+; X86-SSE-NEXT: movdqa 56(%ebp), %xmm4
+; X86-SSE-NEXT: movdqa 40(%ebp), %xmm5
+; X86-SSE-NEXT: movdqa 24(%ebp), %xmm6
+; X86-SSE-NEXT: movl 8(%ebp), %esi
+; X86-SSE-NEXT: movl 80(%ebp), %edx
+; X86-SSE-NEXT: movl (%edx), %eax
+; X86-SSE-NEXT: addps {{\.LCPI.*}}, %xmm0
+; X86-SSE-NEXT: movntps %xmm0, (%esi)
+; X86-SSE-NEXT: paddq {{\.LCPI.*}}, %xmm2
+; X86-SSE-NEXT: addl (%edx), %eax
+; X86-SSE-NEXT: movntdq %xmm2, (%esi)
+; X86-SSE-NEXT: addpd {{\.LCPI.*}}, %xmm1
+; X86-SSE-NEXT: addl (%edx), %eax
+; X86-SSE-NEXT: movntpd %xmm1, (%esi)
+; X86-SSE-NEXT: paddd {{\.LCPI.*}}, %xmm6
+; X86-SSE-NEXT: addl (%edx), %eax
+; X86-SSE-NEXT: movntdq %xmm6, (%esi)
+; X86-SSE-NEXT: paddw {{\.LCPI.*}}, %xmm5
+; X86-SSE-NEXT: addl (%edx), %eax
+; X86-SSE-NEXT: movntdq %xmm5, (%esi)
+; X86-SSE-NEXT: paddb {{\.LCPI.*}}, %xmm4
+; X86-SSE-NEXT: addl (%edx), %eax
+; X86-SSE-NEXT: movntdq %xmm4, (%esi)
+; X86-SSE-NEXT: addl (%edx), %eax
+; X86-SSE-NEXT: movntil %ecx, (%esi)
+; X86-SSE-NEXT: addl (%edx), %eax
+; X86-SSE-NEXT: movsd %xmm3, (%esi)
+; X86-SSE-NEXT: addl (%edx), %eax
+; X86-SSE-NEXT: leal -4(%ebp), %esp
+; X86-SSE-NEXT: popl %esi
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
;
-; X32-AVX-LABEL: f:
-; X32-AVX: # %bb.0:
-; X32-AVX-NEXT: pushl %ebp
-; X32-AVX-NEXT: movl %esp, %ebp
-; X32-AVX-NEXT: pushl %esi
-; X32-AVX-NEXT: andl $-16, %esp
-; X32-AVX-NEXT: subl $16, %esp
-; X32-AVX-NEXT: vmovsd {{.*#+}} xmm3 = mem[0],zero
-; X32-AVX-NEXT: movl 12(%ebp), %ecx
-; X32-AVX-NEXT: vmovdqa 56(%ebp), %xmm4
-; X32-AVX-NEXT: vmovdqa 40(%ebp), %xmm5
-; X32-AVX-NEXT: vmovdqa 24(%ebp), %xmm6
-; X32-AVX-NEXT: movl 8(%ebp), %edx
-; X32-AVX-NEXT: movl 80(%ebp), %esi
-; X32-AVX-NEXT: movl (%esi), %eax
-; X32-AVX-NEXT: vaddps {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-AVX-NEXT: vmovntps %xmm0, (%edx)
-; X32-AVX-NEXT: vpaddq {{\.LCPI.*}}, %xmm2, %xmm0
-; X32-AVX-NEXT: addl (%esi), %eax
-; X32-AVX-NEXT: vmovntdq %xmm0, (%edx)
-; X32-AVX-NEXT: vaddpd {{\.LCPI.*}}, %xmm1, %xmm0
-; X32-AVX-NEXT: addl (%esi), %eax
-; X32-AVX-NEXT: vmovntpd %xmm0, (%edx)
-; X32-AVX-NEXT: vpaddd {{\.LCPI.*}}, %xmm6, %xmm0
-; X32-AVX-NEXT: addl (%esi), %eax
-; X32-AVX-NEXT: vmovntdq %xmm0, (%edx)
-; X32-AVX-NEXT: vpaddw {{\.LCPI.*}}, %xmm5, %xmm0
-; X32-AVX-NEXT: addl (%esi), %eax
-; X32-AVX-NEXT: vmovntdq %xmm0, (%edx)
-; X32-AVX-NEXT: vpaddb {{\.LCPI.*}}, %xmm4, %xmm0
-; X32-AVX-NEXT: addl (%esi), %eax
-; X32-AVX-NEXT: vmovntdq %xmm0, (%edx)
-; X32-AVX-NEXT: addl (%esi), %eax
-; X32-AVX-NEXT: movntil %ecx, (%edx)
-; X32-AVX-NEXT: addl (%esi), %eax
-; X32-AVX-NEXT: vmovsd %xmm3, (%edx)
-; X32-AVX-NEXT: addl (%esi), %eax
-; X32-AVX-NEXT: leal -4(%ebp), %esp
-; X32-AVX-NEXT: popl %esi
-; X32-AVX-NEXT: popl %ebp
-; X32-AVX-NEXT: retl
+; X86-AVX-LABEL: f:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: pushl %ebp
+; X86-AVX-NEXT: movl %esp, %ebp
+; X86-AVX-NEXT: pushl %esi
+; X86-AVX-NEXT: andl $-16, %esp
+; X86-AVX-NEXT: subl $16, %esp
+; X86-AVX-NEXT: vmovsd {{.*#+}} xmm3 = mem[0],zero
+; X86-AVX-NEXT: movl 12(%ebp), %ecx
+; X86-AVX-NEXT: vmovdqa 56(%ebp), %xmm4
+; X86-AVX-NEXT: vmovdqa 40(%ebp), %xmm5
+; X86-AVX-NEXT: vmovdqa 24(%ebp), %xmm6
+; X86-AVX-NEXT: movl 8(%ebp), %edx
+; X86-AVX-NEXT: movl 80(%ebp), %esi
+; X86-AVX-NEXT: movl (%esi), %eax
+; X86-AVX-NEXT: vaddps {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vmovntps %xmm0, (%edx)
+; X86-AVX-NEXT: vpaddq {{\.LCPI.*}}, %xmm2, %xmm0
+; X86-AVX-NEXT: addl (%esi), %eax
+; X86-AVX-NEXT: vmovntdq %xmm0, (%edx)
+; X86-AVX-NEXT: vaddpd {{\.LCPI.*}}, %xmm1, %xmm0
+; X86-AVX-NEXT: addl (%esi), %eax
+; X86-AVX-NEXT: vmovntpd %xmm0, (%edx)
+; X86-AVX-NEXT: vpaddd {{\.LCPI.*}}, %xmm6, %xmm0
+; X86-AVX-NEXT: addl (%esi), %eax
+; X86-AVX-NEXT: vmovntdq %xmm0, (%edx)
+; X86-AVX-NEXT: vpaddw {{\.LCPI.*}}, %xmm5, %xmm0
+; X86-AVX-NEXT: addl (%esi), %eax
+; X86-AVX-NEXT: vmovntdq %xmm0, (%edx)
+; X86-AVX-NEXT: vpaddb {{\.LCPI.*}}, %xmm4, %xmm0
+; X86-AVX-NEXT: addl (%esi), %eax
+; X86-AVX-NEXT: vmovntdq %xmm0, (%edx)
+; X86-AVX-NEXT: addl (%esi), %eax
+; X86-AVX-NEXT: movntil %ecx, (%edx)
+; X86-AVX-NEXT: addl (%esi), %eax
+; X86-AVX-NEXT: vmovsd %xmm3, (%edx)
+; X86-AVX-NEXT: addl (%esi), %eax
+; X86-AVX-NEXT: leal -4(%ebp), %esp
+; X86-AVX-NEXT: popl %esi
+; X86-AVX-NEXT: popl %ebp
+; X86-AVX-NEXT: retl
;
; X64-SSE-LABEL: f:
; X64-SSE: # %bb.0:
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