[PATCH] D91629: [PowerPC] Handle FP physical register in inline asm constraint.

[Sean Fertile via Phabricator via llvm-commits]

sfertile created this revision.
sfertile added reviewers: nemanjai, ZarkoCA, cebowleratibm.
sfertile added a project: PowerPC.
Herald added subscribers: shchenz, kbarton, hiraditya.
Herald added a project: LLVM.
sfertile requested review of this revision.

Do not defer to the base class when the register constraint is a physical fpr. The base class will select SPILLTOVSX as the register class and register allocation will fail on subtargets without VSX registers.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D91629

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/test/CodeGen/PowerPC/inline-asm-physical-fpr-spe.ll
  llvm/test/CodeGen/PowerPC/inline-asm-physical-fpr.ll

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