[PATCH] D88391: [M68k] (Patch 5/8) Target lowering
Renato Golin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 17 03:23:49 PST 2020
rengolin added a comment.
I only had a very quick overview and this looks fine.
I can't possibly comment on the m68k implementation and I'm hoping other back-end developers with more up-to-date experience will chime in.
================
Comment at: llvm/lib/Target/M68k/M68k.h:27
+/// instruction scheduling.
+FunctionPass *createM68kISelDag(M68kTargetMachine &TM);
+
----------------
It would be so nice if we could start all new targets with support for Global ISel instead...
Oh well, Long live SelectionDAG! :)
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Comment at: llvm/lib/Target/M68k/M68kSubtarget.cpp:83
+//===----------------------------------------------------------------------===//
+// Code Model
+//
----------------
Nice!
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Comment at: llvm/lib/Target/M68k/M68kTargetMachine.cpp:36
+
+// FIXME #28 this layout is true for M68000 original cpu, other variants will
+// affect DL computation
----------------
Are these github issues? If so, it would be nice to replace them with a proper explanation. When moving to the llvm repo, the connection will disappear.
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https://reviews.llvm.org/D88391/new/
https://reviews.llvm.org/D88391
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