[llvm] 4ce3d27 - [Test] One more widening opportunity test

[Max Kazantsev via llvm-commits]

Author: Max Kazantsev
Date: 2020-11-17T12:53:43+07:00
New Revision: 4ce3d2715a41aca2e153f5fa36a428c8b75270a5

URL: https://github.com/llvm/llvm-project/commit/4ce3d2715a41aca2e153f5fa36a428c8b75270a5
DIFF: https://github.com/llvm/llvm-project/commit/4ce3d2715a41aca2e153f5fa36a428c8b75270a5.diff

LOG: [Test] One more widening opportunity test

Added: 
    

Modified: 
    llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll b/llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll
index 8d1303d382de..e6a182afad60 100644
--- a/llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll
+++ b/llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll
@@ -691,3 +691,54 @@ exit:
 failure:
   unreachable
 }
+
+define i32 @test14(i32 %start, i32* %p, i32* %q) {
+; CHECK-LABEL: @test14(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = zext i32 [[START:%.*]] to i64
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[BACKEDGE:%.*]] ], [ [[TMP0]], [[ENTRY:%.*]] ]
+; CHECK-NEXT:    [[COND:%.*]] = icmp eq i64 [[INDVARS_IV]], 0
+; CHECK-NEXT:    [[TMP1:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT:    [[FOO:%.*]] = add i32 [[TMP1]], -1
+; CHECK-NEXT:    br i1 [[COND]], label [[EXIT:%.*]], label [[BACKEDGE]]
+; CHECK:       backedge:
+; CHECK-NEXT:    [[INDEX:%.*]] = zext i32 [[FOO]] to i64
+; CHECK-NEXT:    [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[INDEX]]
+; CHECK-NEXT:    store i32 1, i32* [[STORE_ADDR]], align 4
+; CHECK-NEXT:    [[LOAD_ADDR:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 [[INDEX]]
+; CHECK-NEXT:    [[STOP:%.*]] = load i32, i32* [[Q]], align 4
+; CHECK-NEXT:    [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
+; CHECK-NEXT:    [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
+; CHECK-NEXT:    br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    ret i32 -1
+; CHECK:       failure:
+; CHECK-NEXT:    unreachable
+;
+entry:
+  br label %loop
+
+loop:
+  %iv = phi i32 [%start, %entry], [%iv.next.1, %backedge]
+  %cond = icmp eq i32 %iv, 0
+  %foo = add i32 %iv, -1
+  br i1 %cond, label %exit, label %backedge
+
+backedge:
+  %index = zext i32 %foo to i64
+  %store.addr = getelementptr i32, i32* %p, i64 %index
+  store i32 1, i32* %store.addr
+  %load.addr = getelementptr i32, i32* %q, i64 %index
+  %stop = load i32, i32* %q
+  %loop.cond = icmp eq i32 %stop, 0
+  %iv.next.1 = add i32 %iv, -1
+  br i1 %loop.cond, label %loop, label %failure
+
+exit:
+  ret i32 %foo
+
+failure:
+  unreachable
+}