[llvm] 5a4ca8b - [ConstraintElimination] Add support for Or.

[Florian Hahn via llvm-commits]

Author: Florian Hahn
Date: 2020-11-16T21:48:38Z
New Revision: 5a4ca8b550afea96c0539083b470f87b40226688

URL: https://github.com/llvm/llvm-project/commit/5a4ca8b550afea96c0539083b470f87b40226688
DIFF: https://github.com/llvm/llvm-project/commit/5a4ca8b550afea96c0539083b470f87b40226688.diff

LOG: [ConstraintElimination] Add support for Or.

When processing conditional branches, if the condition is an OR of 2 compares
and the false successor only has the current block as predecessor, queue both
negated conditions for the false successor

Added: 
    

Modified: 
    llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
    llvm/test/Transforms/ConstraintElimination/or.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp b/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
index 714fae9ce6775..c43cb39a5918a 100644
--- a/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
+++ b/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
@@ -166,6 +166,22 @@ static bool eliminateConstraints(Function &F, DominatorTree &DT) {
     auto *Br = dyn_cast<BranchInst>(BB.getTerminator());
     if (!Br || !Br->isConditional())
       continue;
+
+    // If the condition is an OR of 2 compares and the false successor only has
+    // the current block as predecessor, queue both negated conditions for the
+    // false successor.
+    if (match(Br->getCondition(), m_Or(m_Cmp(), m_Cmp()))) {
+      BasicBlock *FalseSuccessor = Br->getSuccessor(1);
+      if (FalseSuccessor->getSinglePredecessor()) {
+        auto *OrI = cast<Instruction>(Br->getCondition());
+        WorkList.emplace_back(DT.getNode(FalseSuccessor),
+                              cast<CmpInst>(OrI->getOperand(0)), true);
+        WorkList.emplace_back(DT.getNode(FalseSuccessor),
+                              cast<CmpInst>(OrI->getOperand(1)), true);
+      }
+      continue;
+    }
+
     auto *CmpI = dyn_cast<CmpInst>(Br->getCondition());
     if (!CmpI)
       continue;

diff  --git a/llvm/test/Transforms/ConstraintElimination/or.ll b/llvm/test/Transforms/ConstraintElimination/or.ll
index 400fedd6ea212..31a1803d86217 100644
--- a/llvm/test/Transforms/ConstraintElimination/or.ll
+++ b/llvm/test/Transforms/ConstraintElimination/or.ll
@@ -18,15 +18,15 @@ define i32 @test_or_ule(i32 %x, i32 %y, i32 %z, i32 %a) {
 ; CHECK-NEXT:    ret i32 10
 ; CHECK:       exit:
 ; CHECK-NEXT:    [[F_1:%.*]] = icmp ule i32 [[X]], [[Z]]
-; CHECK-NEXT:    call void @use(i1 [[F_1]])
+; CHECK-NEXT:    call void @use(i1 false)
 ; CHECK-NEXT:    [[C_5:%.*]] = icmp ule i32 [[X]], [[A]]
 ; CHECK-NEXT:    call void @use(i1 [[C_5]])
 ; CHECK-NEXT:    [[T_1:%.*]] = icmp ugt i32 [[Y]], [[Z]]
-; CHECK-NEXT:    call void @use(i1 [[T_1]])
+; CHECK-NEXT:    call void @use(i1 true)
 ; CHECK-NEXT:    [[T_2:%.*]] = icmp ugt i32 [[X]], [[Y]]
-; CHECK-NEXT:    call void @use(i1 [[T_2]])
+; CHECK-NEXT:    call void @use(i1 true)
 ; CHECK-NEXT:    [[T_3:%.*]] = icmp ugt i32 [[X]], [[Z]]
-; CHECK-NEXT:    call void @use(i1 [[T_3]])
+; CHECK-NEXT:    call void @use(i1 true)
 ; CHECK-NEXT:    ret i32 20
 ;
 entry: