[PATCH] D90961: [RISCV] When matching SROIW, check all 64 bits of the OR mask

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In D90961#2397314 <https://reviews.llvm.org/D90961#2397314>, @frasercrmck wrote:

> Apart from my nits, this makes sense to me. The only thing I don't fully get it where/why the original code asserted if the shift amount was >= 32.

The assert is inside maskLeadingOnes<uint32_t>. There's a check that the bit count passed in is <= that size of the type passed as the template parameter.

> Regarding `SLOIW` I'm not sure you'll find a test case where the mask isn't wholly contained in the 32 lower bits since the or and the shl are `i32` operations. But I don't think it hurts to check all 64 bits.




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