[PATCH] D91545: [AMDGPU] Consolidate memory-legalizer tests

Scott Linder via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 16 08:00:16 PST 2020


scott.linder created this revision.
Herald added subscribers: llvm-commits, kerbowa, jfb, t-tye, tpr, dstuttard, yaxunl, nhaehnle, jvesely, kzhuravl.
Herald added a project: LLVM.
scott.linder requested review of this revision.
Herald added a subscriber: wdng.

Move as many test cases as possible into `memory-legalizer.{ll,mir}`,
i.e. try to have only one file for IR and one for MIR. Any tests which
don't fit in this scheme (i.e. for GFX6 which lacks FLAT, and for tests
which need `not` runlines to check for error handling) reside in
`memory-legalizer-<variant>.{ll,mir}`.

Standardize on the set of RUN lines for these test to include one MCPU
per `CacheControl` defined in the memory legalizer, plus variants for
different settings of `cumode` for GFX10. Note that due to a bug in
code-gen for GFX6 the run line in memory-legalizer-gfx6.ll must use a
triple with the default OS.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D91545

Files:
  llvm/test/CodeGen/AMDGPU/memory-legalizer-amdpal.ll
  llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-cmpxchg.ll
  llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-fence.ll
  llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir
  llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-rmw.ll
  llvm/test/CodeGen/AMDGPU/memory-legalizer-fences-amdpal-mesa3d.ll
  llvm/test/CodeGen/AMDGPU/memory-legalizer-gfx6.ll
  llvm/test/CodeGen/AMDGPU/memory-legalizer-invalid-addrspace.mir
  llvm/test/CodeGen/AMDGPU/memory-legalizer-invalid-syncscope.ll
  llvm/test/CodeGen/AMDGPU/memory-legalizer-load.ll
  llvm/test/CodeGen/AMDGPU/memory-legalizer-local.mir
  llvm/test/CodeGen/AMDGPU/memory-legalizer-mesa3d.ll
  llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
  llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir
  llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir
  llvm/test/CodeGen/AMDGPU/memory-legalizer-region.mir
  llvm/test/CodeGen/AMDGPU/memory-legalizer-store-infinite-loop.ll
  llvm/test/CodeGen/AMDGPU/memory-legalizer-store.ll
  llvm/test/CodeGen/AMDGPU/memory-legalizer.ll
  llvm/test/CodeGen/AMDGPU/memory-legalizer.mir



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