[PATCH] D91266: [ARM][SchedModels] Add support for branch forms of ALU instructions to Cortex-A57 model

[Dave Green via Phabricator via llvm-commits]

dmgreen added inline comments.


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Comment at: llvm/utils/TableGen/CodeGenSchedule.cpp:1372
+                                        ArrayRef<Record *> Preds,
+                                        ArrayRef<PredCheck> Term) {  
   for (const PredCheck &PC: Term) {
----------------
Looks like it's worth clang-formatting the change.


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Comment at: llvm/utils/TableGen/CodeGenSchedule.cpp:1390-1392
+      // Here C is not mutually exclusive with variant (1), because A doesn't
+      // exist in variant (2). This means we have possible transitions from A
+      // to C and from A to C, and fully expanded sequence would look like:
----------------
"A to C and from A to B"?

Wonderful comment by the way, now that (I think) I understand it.



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Comment at: llvm/utils/TableGen/SubtargetEmitter.cpp:1452
+         Rec->getValueAsDef("Pred")->isSubClassOf("MCTrue");
+};
+
----------------
Extra ;


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Comment at: llvm/utils/TableGen/SubtargetEmitter.cpp:1624
 
         PE.setIndentLevel(3);
+        // If transition is folded to 'return X' it should be the last one.
----------------
This can probably move below the if


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  https://reviews.llvm.org/D91266/new/

https://reviews.llvm.org/D91266