[PATCH] D91279: [PowerPC] DForm instructions should be preferred when using zero register

Victor Huang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Nov 13 09:37:45 PST 2020


NeHuang added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp:417
+
+          // should prefer D-form if LXVX / STXVX uses a ZERO or ZERO8
+          if (MI.getOpcode() == PPC::LXVX || MI.getOpcode() == PPC::STXVX) {
----------------
amyk wrote:
> Please capitalize and end with a period for the comments. 
> Is it possible to elaborate a bit more on the comments? In terms of why we were prefer the D-Forms, and why we should not apply the transformation if its a frame index. 
nit: add a period at the end of comment and do the same for other comments. 


================
Comment at: llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp:424
+                 MI.getOperand(1).getReg() == PPC::ZERO8)) {
+              MI.setDesc(TII->get(MI.getOpcode() == PPC::STXVX ? PPC::STXV : PPC::LXV));
+
----------------
run `clang-format` to pass pre-merge checks 


================
Comment at: llvm/test/CodeGen/PowerPC/VSX-XForm-Scalars.ll:2
 ; RUN: llc < %s -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown \
-; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names -verify-machineinstrs \
+; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names -verify-machineinstrs \ 
 ; RUN:   | FileCheck %s --check-prefix=CHECK-P8
----------------
amyk wrote:
> I think this is an unrelated change. 
+1 


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D91279/new/

https://reviews.llvm.org/D91279



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