[llvm] 6c20c1d - [AArch64][GlobalISel] NFC: Use CmpInst::isUnsigned instead of static helper

Jessica Paquette via llvm-commits llvm-commits at lists.llvm.org
Fri Nov 13 09:36:31 PST 2020


Author: Jessica Paquette
Date: 2020-11-13T09:35:42-08:00
New Revision: 6c20c1da1e5cb1b014043f2ef3bba2550d5f5a67

URL: https://github.com/llvm/llvm-project/commit/6c20c1da1e5cb1b014043f2ef3bba2550d5f5a67
DIFF: https://github.com/llvm/llvm-project/commit/6c20c1da1e5cb1b014043f2ef3bba2550d5f5a67.diff

LOG: [AArch64][GlobalISel] NFC: Use CmpInst::isUnsigned instead of static helper

Reducing some code duplication.

We had a helper for checking if a predicate is unsigned. Remove that and use
the existing function in Instructions.cpp.

Differential Revision: https://reviews.llvm.org/D91288

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index 4584308a1002..f7d3bcf80bd7 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -1089,19 +1089,6 @@ AArch64InstructionSelector::emitSelect(Register Dst, Register True,
   return &*SelectInst;
 }
 
-/// Returns true if \p P is an unsigned integer comparison predicate.
-static bool isUnsignedICMPPred(const CmpInst::Predicate P) {
-  switch (P) {
-  default:
-    return false;
-  case CmpInst::ICMP_UGT:
-  case CmpInst::ICMP_UGE:
-  case CmpInst::ICMP_ULT:
-  case CmpInst::ICMP_ULE:
-    return true;
-  }
-}
-
 static AArch64CC::CondCode changeICMPPredToAArch64CC(CmpInst::Predicate P) {
   switch (P) {
   default:
@@ -4379,7 +4366,7 @@ MachineInstr *AArch64InstructionSelector::tryFoldIntegerCompare(
   // Produce this if the compare is signed:
   //
   // tst x, y
-  if (!isUnsignedICMPPred(P) && LHSDef &&
+  if (!CmpInst::isUnsigned(P) && LHSDef &&
       LHSDef->getOpcode() == TargetOpcode::G_AND) {
     // Make sure that the RHS is 0.
     auto ValAndVReg = getConstantVRegValWithLookThrough(RHS.getReg(), MRI);


        


More information about the llvm-commits mailing list