[PATCH] D91386: [PowerPC] Add peephole to remove redundant accumulator prime/unprime instructions
Victor Huang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 13 09:28:40 PST 2020
NeHuang added inline comments.
================
Comment at: llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp:373
+ // If we are visiting a xxmtacc instruction, we add its operand register
+ // to the candidate set.
+ if (Opc == PPC::XXMTACC) {
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Question: Besides adding the operand register to the candidate, are we also recording the machine instruction used the register candidate? If I understand it properly, can we also add it in the comment? This would help understand your comment below `we mark the two instructions for removal.` - line 380
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Comment at: llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp:376
+ Register Acc = BBI.getOperand(0).getReg();
+ assert(PPC::ACCRCRegClass.contains(Acc) && "Unexpected register");
+ Candidates[Acc - PPC::ACC0] = &BBI;
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nit: do you think we need to add instruction OPC information in the message to differentiate them?
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Comment at: llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp:379
+ }
+ // If we are visiting a xxmfacc instruction and its operand is in the
+ // candidate set, we mark the two instructions for removal.
----------------
nit: operand -> operand register
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https://reviews.llvm.org/D91386/new/
https://reviews.llvm.org/D91386
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