[PATCH] D91110: [AMDGPU] Remove scratch rsrc from spill pseudos

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec updated this revision to Diff 304951.
rampitec added a comment.

OK, let's untangle this from dead slot elimination.
Dropped rsrc operand completely.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D91110/new/

https://reviews.llvm.org/D91110

Files:
  llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
  llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/lib/Target/AMDGPU/SIInstructions.td
  llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  llvm/lib/Target/AMDGPU/SIRegisterInfo.h
  llvm/test/CodeGen/AMDGPU/addrspacecast.ll
  llvm/test/CodeGen/AMDGPU/fast-ra-kills-vcc.mir
  llvm/test/CodeGen/AMDGPU/fastregalloc-self-loop-heuristic.mir
  llvm/test/CodeGen/AMDGPU/frame-lowering-fp-adjusted.mir
  llvm/test/CodeGen/AMDGPU/idot8s.ll
  llvm/test/CodeGen/AMDGPU/idot8u.ll
  llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
  llvm/test/CodeGen/AMDGPU/pei-reg-scavenger-position.mir
  llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir
  llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-gfx9.mir
  llvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir
  llvm/test/CodeGen/AMDGPU/sgpr-spill-wrong-stack-id.mir
  llvm/test/CodeGen/AMDGPU/spill-agpr-partially-undef.mir
  llvm/test/CodeGen/AMDGPU/spill-agpr.mir
  llvm/test/CodeGen/AMDGPU/spill-empty-live-interval.mir
  llvm/test/CodeGen/AMDGPU/spill-reg-tuple-super-reg-use.mir
  llvm/test/CodeGen/AMDGPU/spill192.mir
  llvm/test/CodeGen/AMDGPU/splitkit-copy-bundle.mir
  llvm/test/CodeGen/AMDGPU/splitkit-copy-live-lanes.mir
  llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
  llvm/test/CodeGen/AMDGPU/splitkit-nolivesubranges.mir
  llvm/test/CodeGen/AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir
  llvm/test/CodeGen/AMDGPU/subreg-split-live-in-error.mir
  llvm/test/CodeGen/AMDGPU/unexpected-reg-unit-state.mir
  llvm/test/CodeGen/AMDGPU/vgpr-spill.mir

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