[PATCH] D82227: SLP: honor requested max vector size merging PHIs

Wed Nov 11 10:27:19 PST 2020

rampitec added a comment.

In D82227#2389258 <https://reviews.llvm.org/D82227#2389258>, @jonpa wrote:

> In D82227#2389246 <https://reviews.llvm.org/D82227#2389246>, @rampitec wrote:
>
>> In D82227#2389212 <https://reviews.llvm.org/D82227#2389212>, @jonpa wrote:
>>
>>> I am afraid that this patch actually has a bad impact on performance on SystemZ, and unfortunately this was not known until now. It would be very appreciated if we could rework this and get back the old behaviour on SystemZ somehow...
>>>
>>> See https://bugs.llvm.org/show_bug.cgi?id=48155
>>
>> I believe if a target wants to have wider vectors it needs to increase the size returned from its TTIImpl::getRegisterBitWidth(). Can you try increasing a return from SystemZTTIImpl::getRegisterBitWidth()?
>
> I did try to override this with -slp-max-reg-size, and that works... However getRegisterBitWidth() is also used by other passes, like the LoopVectorizer, so it seems wrong to change that value as it is defined just for the purpose of tuning a particular optimization...

The other pass which calls getRegisterBitWidth(true) is LoopVectorize. Do you mean you want to have different heuristics for loop and straight-line vectorization?

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https://reviews.llvm.org/D82227