[PATCH] D91435: [AMDGPU] Split edge to make si_if dominate end_cf

[Alexander via Phabricator via llvm-commits]

alex-t created this revision.
alex-t added reviewers: arsenm, rampitec.
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Basic block containing "if" not necessarily do,imates block that is the "false" target for the if.

That "false" target block may have another predecessors besides the "if" block. IR value corresponding to the Exec mask is generated by the

si_if intrinsic and then used by the end_cf intrinsic. In this case IR verifier complains that 'Def does not dominate all uses'.

This change split the edge between the "if" block and "false" target block to make it dominated by the "if" block.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D91435

Files:
  llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp


Index: llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
+++ llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
@@ -313,8 +313,15 @@
 
   Value *Exec = popSaved();
   Instruction *FirstInsertionPt = &*BB->getFirstInsertionPt();
-  if (!isa<UndefValue>(Exec) && !isa<UnreachableInst>(FirstInsertionPt))
+  if (!isa<UndefValue>(Exec) && !isa<UnreachableInst>(FirstInsertionPt)) {
+    Instruction *ExecDef = dyn_cast<Instruction>(Exec);
+    BasicBlock *DefBB = ExecDef->getParent();
+    if (!DT->dominates(DefBB, BB)) {
+      // Split edge to make Def dominate Use
+      FirstInsertionPt = &*SplitEdge(DefBB, BB, DT, LI)->getFirstInsertionPt();
+    }
     CallInst::Create(EndCf, Exec, "", FirstInsertionPt);
+  }
 }
 
 /// Annotate the control flow with intrinsics so the backend can
@@ -327,7 +334,6 @@
   const TargetMachine &TM = TPC.getTM<TargetMachine>();
 
   initialize(*F.getParent(), TM.getSubtarget<GCNSubtarget>(F));
-
   for (df_iterator<BasicBlock *> I = df_begin(&F.getEntryBlock()),
        E = df_end(&F.getEntryBlock()); I != E; ++I) {
     BasicBlock *BB = *I;


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