[llvm] fa9f413 - [gn build] (manually) port 410626c9b56

[Nico Weber via llvm-commits]

Author: Nico Weber
Date: 2020-11-12T18:21:22-05:00
New Revision: fa9f41330d706d14e048564d827ffd6a8effa269

URL: https://github.com/llvm/llvm-project/commit/fa9f41330d706d14e048564d827ffd6a8effa269
DIFF: https://github.com/llvm/llvm-project/commit/fa9f41330d706d14e048564d827ffd6a8effa269.diff

LOG: [gn build] (manually) port 410626c9b56

Added: 
    

Modified: 
    llvm/utils/gn/secondary/llvm/include/llvm/IR/BUILD.gn

Removed: 
    


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diff  --git a/llvm/utils/gn/secondary/llvm/include/llvm/IR/BUILD.gn b/llvm/utils/gn/secondary/llvm/include/llvm/IR/BUILD.gn
index 9dad1b97f9f1..f12d39ad6e46 100644
--- a/llvm/utils/gn/secondary/llvm/include/llvm/IR/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/include/llvm/IR/BUILD.gn
@@ -127,6 +127,16 @@ tablegen("IntrinsicsS390") {
   td_file = "Intrinsics.td"
 }
 
+tablegen("IntrinsicsVE") {
+  visibility = [ ":public_tablegen" ]
+  output_name = "IntrinsicsVE.h"
+  args = [
+    "-gen-intrinsic-enums",
+    "-intrinsic-prefix=ve",
+  ]
+  td_file = "Intrinsics.td"
+}
+
 tablegen("IntrinsicsWebAssembly") {
   visibility = [ ":public_tablegen" ]
   output_name = "IntrinsicsWebAssembly.h"
@@ -182,6 +192,7 @@ group("public_tablegen") {
     ":IntrinsicsR600",
     ":IntrinsicsRISCV",
     ":IntrinsicsS390",
+    ":IntrinsicsVE",
     ":IntrinsicsWebAssembly",
     ":IntrinsicsX86",
     ":IntrinsicsXCore",