[PATCH] D90935: [ARM][LowOverheadLoops] Merge VCMP and VPST across VPT blocks

[Dave Green via Phabricator via llvm-commits]

dmgreen added inline comments.


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Comment at: llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp:1595
+      auto Next = ++MachineBasicBlock::iterator(VPST);
+      bool NextIsPredicated = getVPTInstrPredicate(*Next) != ARMVCC::None;
+      bool IntermediateInstrsUseVPR = false;
----------------
I think this should always be true. Maybe turn it into an assert?


================
Comment at: llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp:1597
+      bool IntermediateInstrsUseVPR = false;
+      if (VCMP) {
+        for (auto I = ++MachineBasicBlock::iterator(VCMP),
----------------
The `if VCMP` can probably be hoisted to the `Insts.front()->getOpcode() == ARM::MVE_VPST` if.


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Comment at: llvm/test/CodeGen/Thumb2/LowOverheadLoops/vcmp-vpst-combination-across-blocks.mir:283
+    renamable $q0 = MVE_VORR renamable $q1, renamable $q1, 0, $noreg, killed renamable $q0
+    MVE_VPST 4, killed implicit $vpr
+    renamable $q1 = MVE_VORR killed renamable $q1, renamable $q0, 0, $noreg, renamable $q1
----------------
`MVE_VPST 8` I think, for this block


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Comment at: llvm/test/CodeGen/Thumb2/LowOverheadLoops/vcmp-vpst-combination-across-blocks.mir:369
+    renamable $r0, renamable $q1 = MVE_VLDRWU32_post killed renamable $r0, 16, 1, renamable $vpr
+    MVE_VPST 8, implicit $vpr
+    renamable $vpr = MVE_VCMPf32 renamable $q1, renamable $q0, 12, 1, killed renamable $vpr
----------------
Should be `MVE_VPST 4` I think


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Comment at: llvm/test/CodeGen/Thumb2/LowOverheadLoops/vcmp-vpst-combination-across-blocks.mir:371
+    renamable $vpr = MVE_VCMPf32 renamable $q1, renamable $q0, 12, 1, killed renamable $vpr
+    renamable $q0 = MVE_VORR renamable $q1, renamable $q1, 0, renamable $vpr, killed renamable $q0
+    MVE_VPST 8, implicit $vpr
----------------
0 -> 1 for "ARMVCC" operand


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90935/new/

https://reviews.llvm.org/D90935