[PATCH] D91308: AMDGPU: Split large offsets when selecting global saddr mode

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp:1849
+      SDLoc SL(N);
+      // saddr + large_offset -> saddr + (voffset = large_offset & ~MaxOffset) +
+      //                         (large_offset & MaxOffset);
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arsenm wrote:
> rampitec wrote:
> > If you have several consequtive loads this logic will result in reinitialization of vaddr before each load. You could probably mask few low bits in MaxOffset for this purpose to create a window of instructions which can use the same base registers.
> I copied this from the new splitting logic in 760af7a0743278b6dd7782b177f4d6d086c726e0.
> 
> This won't be re-initialized since in the common case the common base part will CSE
Yeah, I understand it is a copy. I had the same sentiment while looking at it earlier.

If you have a same base it will be resused. But then if you have an address different by 4 bytes these 4 bytes will go to register and immediate will be MaxOffset, right?

Also since this is a copy it makes sense to factor it into an utility function.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D91308/new/

https://reviews.llvm.org/D91308