[PATCH] D91271: [AArch64] Attempt to sink mul operands

[Owen Anderson via Phabricator via llvm-commits]

resistor added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:10575
   }
+  case Instruction::Mul: {
+
----------------
Why isn't this logic the same as for Add/Sub above?


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:10587
+      // TODO Why can this sometimes fail?
+      if (isa<Instruction>(&Shuffle->getOperandUse(0)))
+        Ops.push_back(&Shuffle->getOperandUse(0));
----------------
Dynamic extraction from a constant vector.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D91271/new/

https://reviews.llvm.org/D91271