[PATCH] D91273: [ARM] Revert low overhead loops with calls before registry allocation.

[Dave Green via Phabricator via llvm-commits]

dmgreen created this revision.
dmgreen added reviewers: SjoerdMeijer, samtebbs, samparker, simon_tatham, efriedma.
Herald added subscribers: danielkiss, hiraditya, kristof.beyls.
Herald added a project: LLVM.
dmgreen requested review of this revision.

This adds code to revert low overhead loops with calls in them before register allocation. Ideally we would not create low overhead loops with calls in them to begin with, but that can be difficult to always get correct. If we want to try and glue together t2LoopDec and t2LoopEnd into a single instruction, we need to ensure that no instructions use LR in the loop. (Technically the final code can be better too, as it doesn't need to use the same registers but that has not been optimized for here, as reverting loops with calls is expected to be very rare).

It also adds a MVETailPredUtils.h header to share the revert code between different passes, and provides a place to expand upon, with RevertLoopWithCall becoming a place to perform other low overhead loop alterations like removing copies or combining LoopDec and End into a single instruction.


https://reviews.llvm.org/D91273

Files:
  llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
  llvm/lib/Target/ARM/ARMBaseInstrInfo.h
  llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
  llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp
  llvm/lib/Target/ARM/MVETailPredUtils.h
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/biquad-cascade-default.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/biquad-cascade-optsize-strd-lr.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-dec-copy-chain.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/revert-non-loop.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/revertcallearly.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/unsafe-cpsr-loop-use.mir

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