[PATCH] D91255: [AArch64] Rearrange (dup(sext/zext)) to (sext/zext(dup))

Wed Nov 11 07:05:43 PST 2020

NickGuy added inline comments.

================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:10584-10586
+
+      // TODO Why can this sometimes fail?
+      if(isa<Instruction>(&Shuffle->getOperandUse(0)))
----------------
SjoerdMeijer wrote:
> NickGuy wrote:
> > In a number of tests, this line is hit more than a few times. Only 1 of which it fails on. Using .dump() to try and identify why didn't help, as it appears to be the same style as the others that pass (e.g. %tmp3 = sext <8 x i8> %arg to <8 x i16>)
> > If anyone can provide insight to this, I would greatly appreciate it :)
> what do you mean by fail? I guess that's a segfault?
> I guess you need to make sure it is an instruction first with dyn_cast, then you check its operands and uses. 
Sorry, I should've been a bit clearer.
It fails with an assertion error that stems from an invalid cast in CodeGenPrepare::tryToSinkFreeOperands.

Shuffle->getOperandUse(0).dump() outputs something that looks like an instruction, but reportedly isn't, and only in a single case. It's simple to work around, but I was curious as to if anyone had an idea as to what was happening.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D91255/new/

https://reviews.llvm.org/D91255