[PATCH] D90853: [RISCV] Add DAG nodes to represent read/write CSR

Jessica Clarke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 11 04:10:02 PST 2020

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jrtc27 added a comment.

I’m pretty sure you can use X0 as the output...


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90853/new/

https://reviews.llvm.org/D90853

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