[PATCH] D91244: [GlobalISel] Add missing operand update when copy is required

Gabriel Hjort Ã…kerlund via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 11 03:41:33 PST 2020


ehjogab created this revision.
ehjogab added reviewers: dsanders, arsenm, qcolombet, ab, bjope, rovka.
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Herald added a subscriber: wdng.

When constraining an operand register using constrainOperandRegClass(),
the function may emit a COPY in case the provided register class does
not match the current operand register class. However, the operand
itself is not updated to make use of the COPY, thereby resulting in
incorrect code. This patch fixes that bug by updating the machine
operand accordingly.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D91244

Files:
  llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp


Index: llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp
===================================================================
--- llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp
+++ llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp
@@ -41,8 +41,12 @@
   MachineFunction &MF = *MBB.getParent();
   MachineRegisterInfo &MRI = MF.getRegInfo();
 
-  return constrainOperandRegClass(MF, TRI, MRI, TII, RBI, I, RC,
-                                  I.getOperand(OpIdx));
+  MachineOperand &MO = I.getOperand(OpIdx);
+  Register NewReg = constrainOperandRegClass(MF, TRI, MRI, TII, RBI, I, RC, MO);
+  if (NewReg != MO.getReg()) {
+    MO.setReg(NewReg);
+  }
+  return true;
 }
 
 bool InstructionSelector::isOperandImmEqual(


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