[llvm] a45a903 - [X86] Remove unused check-prefixes from some vector tests
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 10 02:49:14 PST 2020
Author: Simon Pilgrim
Date: 2020-11-10T10:48:48Z
New Revision: a45a903a2133c6b03882377f0632b79f24154d5c
URL: https://github.com/llvm/llvm-project/commit/a45a903a2133c6b03882377f0632b79f24154d5c
DIFF: https://github.com/llvm/llvm-project/commit/a45a903a2133c6b03882377f0632b79f24154d5c.diff
LOG: [X86] Remove unused check-prefixes from some vector tests
Added:
Modified:
llvm/test/CodeGen/X86/vec_int_to_fp.ll
llvm/test/CodeGen/X86/vec_uint_to_fp-fastmath.ll
llvm/test/CodeGen/X86/vector-ext-logic.ll
llvm/test/CodeGen/X86/vector-extend-inreg.ll
llvm/test/CodeGen/X86/vector-narrow-binop.ll
llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll
llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
llvm/test/CodeGen/X86/vector-shuffle-combining-sse41.ll
llvm/test/CodeGen/X86/vector-shuffle-combining-sse4a.ll
llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
llvm/test/CodeGen/X86/vector-shuffle-sse41.ll
llvm/test/CodeGen/X86/vector-shuffle-v48.ll
llvm/test/CodeGen/X86/vector-trunc-math.ll
llvm/test/CodeGen/X86/vector-trunc-usat.ll
llvm/test/CodeGen/X86/vector-zmov.ll
llvm/test/CodeGen/X86/vector_splat-const-shift-of-constmasked.ll
llvm/test/CodeGen/X86/volatile.ll
llvm/test/CodeGen/X86/vsel-cmp-load.ll
llvm/test/CodeGen/X86/vselect-2.ll
llvm/test/CodeGen/X86/vselect-constants.ll
llvm/test/CodeGen/X86/vselect-minmax.ll
llvm/test/CodeGen/X86/vselect-packss.ll
llvm/test/CodeGen/X86/vselect-pcmp.ll
llvm/test/CodeGen/X86/vselect-zero.ll
llvm/test/CodeGen/X86/vselect.ll
llvm/test/CodeGen/X86/x87.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/vec_int_to_fp.ll b/llvm/test/CodeGen/X86/vec_int_to_fp.ll
index d48cd14b092e..20cd4d5fe1f4 100644
--- a/llvm/test/CodeGen/X86/vec_int_to_fp.ll
+++ b/llvm/test/CodeGen/X86/vec_int_to_fp.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=ALL,SSE,SSE2
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=ALL,SSE,SSE41
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX,VEX,AVX1
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX,VEX,AVX2
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=ALL,AVX,AVX512,AVX512F
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=ALL,AVX,AVX512,AVX512VL
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=ALL,AVX,AVX512,AVX512DQ
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=ALL,AVX,AVX512,AVX512VLDQ
+; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,VEX,AVX1
+; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,VEX,AVX2
+; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
+; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512VL
+; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX,AVX512,AVX512DQ
+; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512VLDQ
;
; 32-bit tests to make sure we're not doing anything stupid.
; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown
diff --git a/llvm/test/CodeGen/X86/vec_uint_to_fp-fastmath.ll b/llvm/test/CodeGen/X86/vec_uint_to_fp-fastmath.ll
index bff605c0e562..c0beb6fef323 100644
--- a/llvm/test/CodeGen/X86/vec_uint_to_fp-fastmath.ll
+++ b/llvm/test/CodeGen/X86/vec_uint_to_fp-fastmath.ll
@@ -1,15 +1,9 @@
-; RUN: llc < %s -mtriple=x86_64 -enable-unsafe-fp-math \
-; RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=CST --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64 -enable-unsafe-fp-math -mattr=+sse4.1 \
-; RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=CST --check-prefix=SSE --check-prefix=SSE41
-; RUN: llc < %s -mtriple=x86_64 -enable-unsafe-fp-math -mattr=+avx \
-; RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=CST --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64 -enable-unsafe-fp-math -mattr=+avx2 \
-; RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64 -enable-unsafe-fp-math -mattr=+avx512f \
-; RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64 -enable-unsafe-fp-math -mattr=+avx512vl \
-; RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512VL
+; RUN: llc < %s -mtriple=x86_64 -enable-unsafe-fp-math | FileCheck %s --check-prefix=CST --check-prefix=SSE2
+; RUN: llc < %s -mtriple=x86_64 -enable-unsafe-fp-math -mattr=+sse4.1 | FileCheck %s --check-prefix=CST --check-prefix=SSE41
+; RUN: llc < %s -mtriple=x86_64 -enable-unsafe-fp-math -mattr=+avx | FileCheck %s --check-prefix=CST --check-prefix=AVX
+; RUN: llc < %s -mtriple=x86_64 -enable-unsafe-fp-math -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
+; RUN: llc < %s -mtriple=x86_64 -enable-unsafe-fp-math -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
+; RUN: llc < %s -mtriple=x86_64 -enable-unsafe-fp-math -mattr=+avx512vl | FileCheck %s --check-prefix=AVX512VL
; Check that the constant used in the vectors are the right ones.
; SSE2: [[MASKCSTADDR:.LCPI[0-9_]+]]:
diff --git a/llvm/test/CodeGen/X86/vector-ext-logic.ll b/llvm/test/CodeGen/X86/vector-ext-logic.ll
index bec9628f6979..bfaec98d0724 100644
--- a/llvm/test/CodeGen/X86/vector-ext-logic.ll
+++ b/llvm/test/CodeGen/X86/vector-ext-logic.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=ALL,SSE2
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX2
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
define <8 x i32> @zext_and_v8i32(<8 x i16> %x, <8 x i16> %y) {
; SSE2-LABEL: zext_and_v8i32:
diff --git a/llvm/test/CodeGen/X86/vector-extend-inreg.ll b/llvm/test/CodeGen/X86/vector-extend-inreg.ll
index 4b57e694ed60..889ab6a0818e 100644
--- a/llvm/test/CodeGen/X86/vector-extend-inreg.ll
+++ b/llvm/test/CodeGen/X86/vector-extend-inreg.ll
@@ -1,45 +1,45 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=X32-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=X64-SSE
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=X32-AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=X64-AVX
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64-SSE
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X86-AVX
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64-AVX
define i64 @extract_any_extend_vector_inreg_v16i64(<16 x i64> %a0, i32 %a1) nounwind {
-; X32-SSE-LABEL: extract_any_extend_vector_inreg_v16i64:
-; X32-SSE: # %bb.0:
-; X32-SSE-NEXT: pushl %ebp
-; X32-SSE-NEXT: movl %esp, %ebp
-; X32-SSE-NEXT: andl $-16, %esp
-; X32-SSE-NEXT: subl $272, %esp # imm = 0x110
-; X32-SSE-NEXT: movl 88(%ebp), %ecx
-; X32-SSE-NEXT: movdqa 72(%ebp), %xmm0
-; X32-SSE-NEXT: psrldq {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero
-; X32-SSE-NEXT: xorps %xmm1, %xmm1
-; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
-; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
-; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
-; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
-; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
-; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
-; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
-; X32-SSE-NEXT: movdqa %xmm0, {{[0-9]+}}(%esp)
-; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
-; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
-; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
-; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
-; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
-; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
-; X32-SSE-NEXT: movaps %xmm1, (%esp)
-; X32-SSE-NEXT: movdqa %xmm0, {{[0-9]+}}(%esp)
-; X32-SSE-NEXT: leal (%ecx,%ecx), %eax
-; X32-SSE-NEXT: andl $31, %eax
-; X32-SSE-NEXT: movl 128(%esp,%eax,4), %eax
-; X32-SSE-NEXT: leal 1(%ecx,%ecx), %ecx
-; X32-SSE-NEXT: andl $31, %ecx
-; X32-SSE-NEXT: movl (%esp,%ecx,4), %edx
-; X32-SSE-NEXT: movl %ebp, %esp
-; X32-SSE-NEXT: popl %ebp
-; X32-SSE-NEXT: retl
+; X86-SSE-LABEL: extract_any_extend_vector_inreg_v16i64:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $272, %esp # imm = 0x110
+; X86-SSE-NEXT: movl 88(%ebp), %ecx
+; X86-SSE-NEXT: movdqa 72(%ebp), %xmm0
+; X86-SSE-NEXT: psrldq {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero
+; X86-SSE-NEXT: xorps %xmm1, %xmm1
+; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
+; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
+; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
+; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
+; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
+; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
+; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
+; X86-SSE-NEXT: movdqa %xmm0, {{[0-9]+}}(%esp)
+; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
+; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
+; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
+; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
+; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
+; X86-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
+; X86-SSE-NEXT: movaps %xmm1, (%esp)
+; X86-SSE-NEXT: movdqa %xmm0, {{[0-9]+}}(%esp)
+; X86-SSE-NEXT: leal (%ecx,%ecx), %eax
+; X86-SSE-NEXT: andl $31, %eax
+; X86-SSE-NEXT: movl 128(%esp,%eax,4), %eax
+; X86-SSE-NEXT: leal 1(%ecx,%ecx), %ecx
+; X86-SSE-NEXT: andl $31, %ecx
+; X86-SSE-NEXT: movl (%esp,%ecx,4), %edx
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
;
; X64-SSE-LABEL: extract_any_extend_vector_inreg_v16i64:
; X64-SSE: # %bb.0:
@@ -60,33 +60,33 @@ define i64 @extract_any_extend_vector_inreg_v16i64(<16 x i64> %a0, i32 %a1) noun
; X64-SSE-NEXT: popq %rcx
; X64-SSE-NEXT: retq
;
-; X32-AVX-LABEL: extract_any_extend_vector_inreg_v16i64:
-; X32-AVX: # %bb.0:
-; X32-AVX-NEXT: pushl %ebp
-; X32-AVX-NEXT: movl %esp, %ebp
-; X32-AVX-NEXT: andl $-32, %esp
-; X32-AVX-NEXT: subl $288, %esp # imm = 0x120
-; X32-AVX-NEXT: movl 40(%ebp), %ecx
-; X32-AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
-; X32-AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; X32-AVX-NEXT: vmovaps %ymm1, {{[0-9]+}}(%esp)
-; X32-AVX-NEXT: vmovaps %ymm1, {{[0-9]+}}(%esp)
-; X32-AVX-NEXT: vmovaps %ymm1, {{[0-9]+}}(%esp)
-; X32-AVX-NEXT: vmovaps %ymm0, {{[0-9]+}}(%esp)
-; X32-AVX-NEXT: vmovaps %ymm1, {{[0-9]+}}(%esp)
-; X32-AVX-NEXT: vmovaps %ymm1, {{[0-9]+}}(%esp)
-; X32-AVX-NEXT: vmovaps %ymm1, (%esp)
-; X32-AVX-NEXT: vmovaps %ymm0, {{[0-9]+}}(%esp)
-; X32-AVX-NEXT: leal (%ecx,%ecx), %eax
-; X32-AVX-NEXT: andl $31, %eax
-; X32-AVX-NEXT: movl 128(%esp,%eax,4), %eax
-; X32-AVX-NEXT: leal 1(%ecx,%ecx), %ecx
-; X32-AVX-NEXT: andl $31, %ecx
-; X32-AVX-NEXT: movl (%esp,%ecx,4), %edx
-; X32-AVX-NEXT: movl %ebp, %esp
-; X32-AVX-NEXT: popl %ebp
-; X32-AVX-NEXT: vzeroupper
-; X32-AVX-NEXT: retl
+; X86-AVX-LABEL: extract_any_extend_vector_inreg_v16i64:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: pushl %ebp
+; X86-AVX-NEXT: movl %esp, %ebp
+; X86-AVX-NEXT: andl $-32, %esp
+; X86-AVX-NEXT: subl $288, %esp # imm = 0x120
+; X86-AVX-NEXT: movl 40(%ebp), %ecx
+; X86-AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+; X86-AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; X86-AVX-NEXT: vmovaps %ymm1, {{[0-9]+}}(%esp)
+; X86-AVX-NEXT: vmovaps %ymm1, {{[0-9]+}}(%esp)
+; X86-AVX-NEXT: vmovaps %ymm1, {{[0-9]+}}(%esp)
+; X86-AVX-NEXT: vmovaps %ymm0, {{[0-9]+}}(%esp)
+; X86-AVX-NEXT: vmovaps %ymm1, {{[0-9]+}}(%esp)
+; X86-AVX-NEXT: vmovaps %ymm1, {{[0-9]+}}(%esp)
+; X86-AVX-NEXT: vmovaps %ymm1, (%esp)
+; X86-AVX-NEXT: vmovaps %ymm0, {{[0-9]+}}(%esp)
+; X86-AVX-NEXT: leal (%ecx,%ecx), %eax
+; X86-AVX-NEXT: andl $31, %eax
+; X86-AVX-NEXT: movl 128(%esp,%eax,4), %eax
+; X86-AVX-NEXT: leal 1(%ecx,%ecx), %ecx
+; X86-AVX-NEXT: andl $31, %ecx
+; X86-AVX-NEXT: movl (%esp,%ecx,4), %edx
+; X86-AVX-NEXT: movl %ebp, %esp
+; X86-AVX-NEXT: popl %ebp
+; X86-AVX-NEXT: vzeroupper
+; X86-AVX-NEXT: retl
;
; X64-AVX-LABEL: extract_any_extend_vector_inreg_v16i64:
; X64-AVX: # %bb.0:
diff --git a/llvm/test/CodeGen/X86/vector-narrow-binop.ll b/llvm/test/CodeGen/X86/vector-narrow-binop.ll
index cf5f94832284..a25c7adc2f34 100644
--- a/llvm/test/CodeGen/X86/vector-narrow-binop.ll
+++ b/llvm/test/CodeGen/X86/vector-narrow-binop.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll b/llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll
index 47c1e67e096a..979c365acfd7 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X86,AVX,X86-AVX,AVX1,X86-AVX1
-; RUN: llc < %s -disable-peephole -mtriple=i686-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X86,AVX,X86-AVX,AVX2,X86-AVX2
+; RUN: llc < %s -disable-peephole -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X86,AVX,AVX1,X86-AVX1
+; RUN: llc < %s -disable-peephole -mtriple=i686-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X86,AVX,AVX2,X86-AVX2
; RUN: llc < %s -disable-peephole -mtriple=i686-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X86,AVX512,X86-AVX512
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X64,AVX,X64-AVX,AVX1,X64-AVX1
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X64,AVX,X64-AVX,AVX2,X64-AVX2
+; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X64,AVX,AVX1,X64-AVX1
+; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X64,AVX,AVX2,X64-AVX2
; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X64,AVX512,X64-AVX512
;
; Combine tests involving AVX target shuffles
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll b/llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
index e7287162dfcb..7bd466b21daf 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X86,AVX2,X86-AVX2
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X86,AVX512,X86-AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X64,AVX2,X64-AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X64,AVX512,X64-AVX512
+; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X86,AVX2
+; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X86,AVX512
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X64,AVX2
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X64,AVX512
declare <8 x i32> @llvm.x86.avx2.permd(<8 x i32>, <8 x i32>)
declare <8 x float> @llvm.x86.avx2.permps(<8 x float>, <8 x i32>)
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll b/llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
index dd1f766dcf66..56834cc23116 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512F,X86,X86-AVX512F
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512BW,X86,X86-AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512F,X64,X64-AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512BW,X64,X64-AVX512BW
+; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X86,X86-AVX512F
+; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,X86,X86-AVX512BW
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X64,X64-AVX512F
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,X64,X64-AVX512BW
declare <16 x float> @llvm.x86.avx512.mask.vpermilvar.ps.512(<16 x float>, <16 x i32>, <16 x float>, i16)
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-combining-sse41.ll b/llvm/test/CodeGen/X86/vector-shuffle-combining-sse41.ll
index 60c3c8666364..a4755845b111 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-combining-sse41.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-combining-sse41.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX512F
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX
; Combine tests involving SSE41 target shuffles (BLEND,INSERTPS,MOVZX)
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-combining-sse4a.ll b/llvm/test/CodeGen/X86/vector-shuffle-combining-sse4a.ll
index 7fe64031a2a4..69d36078857e 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-combining-sse4a.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-combining-sse4a.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3,+sse4a | FileCheck %s --check-prefixes=CHECK,SSE,SSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2,+sse4a | FileCheck %s --check-prefixes=CHECK,SSE,SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx,+sse4a| FileCheck %s --check-prefixes=CHECK,AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2,+sse4a | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3,+sse4a | FileCheck %s --check-prefixes=CHECK,SSSE3
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2,+sse4a | FileCheck %s --check-prefixes=CHECK,SSE42
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx,+sse4a| FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2,+sse4a | FileCheck %s --check-prefixes=CHECK,AVX
;
; Combine tests involving SSE4A target shuffles (EXTRQI,INSERTQI)
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll b/llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
index f813fec5cab9..f758a1d32c13 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,X86,AVX,X86-AVX
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefixes=CHECK,X86,AVX2,X86-AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,X64,AVX,X64-AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefixes=CHECK,X64,AVX2,X64-AVX2
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,X64,X64-AVX
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefixes=CHECK,X64,X64-AVX2
declare <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double>, <2 x double>, <2 x i64>, i8) nounwind readnone
declare <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double>, <4 x double>, <4 x i64>, i8) nounwind readnone
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-sse41.ll b/llvm/test/CodeGen/X86/vector-shuffle-sse41.ll
index e82170915353..b2b8340d2111 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-sse41.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-sse41.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE41
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefix=AVX
define <8 x i16> @blend_packusdw(<4 x i32> %a0, <4 x i32> %a1, <4 x i32> %a2, <4 x i32> %a3) {
-; SSE41-LABEL: blend_packusdw:
-; SSE41: # %bb.0:
-; SSE41-NEXT: packusdw %xmm2, %xmm0
-; SSE41-NEXT: retq
+; SSE-LABEL: blend_packusdw:
+; SSE: # %bb.0:
+; SSE-NEXT: packusdw %xmm2, %xmm0
+; SSE-NEXT: retq
;
; AVX-LABEL: blend_packusdw:
; AVX: # %bb.0:
@@ -19,10 +19,10 @@ define <8 x i16> @blend_packusdw(<4 x i32> %a0, <4 x i32> %a1, <4 x i32> %a2, <4
}
define <16 x i8> @blend_packuswb(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> %a2, <8 x i16> %a3) {
-; SSE41-LABEL: blend_packuswb:
-; SSE41: # %bb.0:
-; SSE41-NEXT: packuswb %xmm2, %xmm0
-; SSE41-NEXT: retq
+; SSE-LABEL: blend_packuswb:
+; SSE: # %bb.0:
+; SSE-NEXT: packuswb %xmm2, %xmm0
+; SSE-NEXT: retq
;
; AVX-LABEL: blend_packuswb:
; AVX: # %bb.0:
@@ -35,12 +35,12 @@ define <16 x i8> @blend_packuswb(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> %a2, <8
}
define <8 x i16> @blend_packusdw_packuswb(<4 x i32> %a0, <4 x i32> %a1, <8 x i16> %a2, <8 x i16> %a3) {
-; SSE41-LABEL: blend_packusdw_packuswb:
-; SSE41: # %bb.0:
-; SSE41-NEXT: packusdw %xmm0, %xmm0
-; SSE41-NEXT: packuswb %xmm2, %xmm2
-; SSE41-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
-; SSE41-NEXT: retq
+; SSE-LABEL: blend_packusdw_packuswb:
+; SSE: # %bb.0:
+; SSE-NEXT: packusdw %xmm0, %xmm0
+; SSE-NEXT: packuswb %xmm2, %xmm2
+; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
+; SSE-NEXT: retq
;
; AVX-LABEL: blend_packusdw_packuswb:
; AVX: # %bb.0:
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-v48.ll b/llvm/test/CodeGen/X86/vector-shuffle-v48.ll
index 1cf66bb08bb3..974eb083eaf0 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-v48.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-v48.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+ssse3 | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+xop | FileCheck %s --check-prefixes=CHECK,XOP
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx512f,+avx512vl,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx512f,+avx512vl,+avx512vbmi | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512VBMI
+; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+ssse3 | FileCheck %s --check-prefix=SSE
+; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+xop | FileCheck %s --check-prefix=XOP
+; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
+; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefix=AVX512F
+; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx512f,+avx512vl,+avx512bw | FileCheck %s --check-prefix=AVX512BW
+; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx512f,+avx512vl,+avx512vbmi | FileCheck %s --check-prefix=AVX512VBMI
define <32 x i8> @foo(<48 x i8>* %x0) {
; SSE-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/vector-trunc-math.ll b/llvm/test/CodeGen/X86/vector-trunc-math.ll
index 71ffb58a2691..0195fafc7db8 100644
--- a/llvm/test/CodeGen/X86/vector-trunc-math.ll
+++ b/llvm/test/CodeGen/X86/vector-trunc-math.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX,AVX2,AVX2-SLOW
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-SLOW
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-shuffle | FileCheck %s --check-prefixes=ALL,AVX,AVX2,AVX2-FAST
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+fast-variable-shuffle | FileCheck %s --check-prefixes=ALL,AVX,AVX512,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+fast-variable-shuffle | FileCheck %s --check-prefixes=ALL,AVX,AVX512,AVX512DQ
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+fast-variable-shuffle | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BW
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+fast-variable-shuffle | FileCheck %s --check-prefixes=AVX,AVX512,AVX512DQ
;
; add
diff --git a/llvm/test/CodeGen/X86/vector-trunc-usat.ll b/llvm/test/CodeGen/X86/vector-trunc-usat.ll
index 59601e7fb44f..1d347127c184 100644
--- a/llvm/test/CodeGen/X86/vector-trunc-usat.ll
+++ b/llvm/test/CodeGen/X86/vector-trunc-usat.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSSE3
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-SLOW
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-shuffle | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-FAST
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512F
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512,AVX512F
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+fast-variable-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512VL
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+fast-variable-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BW
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BWVL
diff --git a/llvm/test/CodeGen/X86/vector-zmov.ll b/llvm/test/CodeGen/X86/vector-zmov.ll
index eb0c6c68c1e8..cdc092b1e003 100644
--- a/llvm/test/CodeGen/X86/vector-zmov.ll
+++ b/llvm/test/CodeGen/X86/vector-zmov.ll
@@ -2,8 +2,8 @@
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
define <4 x i32> @load_zmov_4i32_to_0zzz(<4 x i32> *%ptr) {
; SSE-LABEL: load_zmov_4i32_to_0zzz:
diff --git a/llvm/test/CodeGen/X86/vector_splat-const-shift-of-constmasked.ll b/llvm/test/CodeGen/X86/vector_splat-const-shift-of-constmasked.ll
index ce9ed0d21baf..137ce2d61883 100644
--- a/llvm/test/CodeGen/X86/vector_splat-const-shift-of-constmasked.ll
+++ b/llvm/test/CodeGen/X86/vector_splat-const-shift-of-constmasked.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=ALL,X32,X32-SSE2,X32-SSE2ONLY
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2,+avx | FileCheck %s --check-prefixes=ALL,X32,X32-SSE2,X32-SSE2AVX,X32-SSE2AVX1
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2,+avx,+avx2 | FileCheck %s --check-prefixes=ALL,X32,X32-SSE2,X32-SSE2AVX,X32-SSE2AVX1AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=ALL,X64,X64-SSE2,X64-SSE2ONLY
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,+avx | FileCheck %s --check-prefixes=ALL,X64,X64-SSE2,X64-SSE2AVX,X64-SSE2AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,+avx,+avx2 | FileCheck %s --check-prefixes=ALL,X64,X64-SSE2,X64-SSE2AVX,X64-SSE2AVX1AVX2
+; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86-SSE2
+; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2,+avx | FileCheck %s --check-prefixes=X86-AVX,X86-AVX1
+; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2,+avx,+avx2 | FileCheck %s --check-prefixes=X86-AVX,X86-AVX2
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X64-SSE2
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,+avx | FileCheck %s --check-prefixes=X64-AVX,X64-AVX1
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,+avx,+avx2 | FileCheck %s --check-prefixes=X64-AVX,X64-AVX2
; The mask is all-ones, potentially shifted.
@@ -15,267 +15,267 @@
; lshr
define <16 x i8> @test_128_i8_x_16_7_mask_lshr_1(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_7_mask_lshr_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $1, %xmm0
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_7_mask_lshr_1:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_7_mask_lshr_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $1, %xmm0
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_7_mask_lshr_1:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_7_mask_lshr_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $1, %xmm0
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_7_mask_lshr_1:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_7_mask_lshr_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $1, %xmm0
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_7_mask_lshr_1:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
%t1 = lshr <16 x i8> %t0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
ret <16 x i8> %t1
}
define <16 x i8> @test_128_i8_x_16_28_mask_lshr_1(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_28_mask_lshr_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $1, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_28_mask_lshr_1:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_28_mask_lshr_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $1, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_28_mask_lshr_1:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_28_mask_lshr_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $1, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_28_mask_lshr_1:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_28_mask_lshr_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $1, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_28_mask_lshr_1:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28>
%t1 = lshr <16 x i8> %t0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
ret <16 x i8> %t1
}
define <16 x i8> @test_128_i8_x_16_28_mask_lshr_2(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_28_mask_lshr_2:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $2, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_28_mask_lshr_2:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $2, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_28_mask_lshr_2:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $2, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_28_mask_lshr_2:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $2, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_28_mask_lshr_2:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $2, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_28_mask_lshr_2:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $2, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_28_mask_lshr_2:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $2, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_28_mask_lshr_2:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $2, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28>
%t1 = lshr <16 x i8> %t0, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>
ret <16 x i8> %t1
}
define <16 x i8> @test_128_i8_x_16_28_mask_lshr_3(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_28_mask_lshr_3:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $3, %xmm0
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_28_mask_lshr_3:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $3, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_28_mask_lshr_3:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $3, %xmm0
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_28_mask_lshr_3:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $3, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_28_mask_lshr_3:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $3, %xmm0
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_28_mask_lshr_3:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $3, %xmm0, %xmm0
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_28_mask_lshr_3:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $3, %xmm0
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_28_mask_lshr_3:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $3, %xmm0, %xmm0
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28>
%t1 = lshr <16 x i8> %t0, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>
ret <16 x i8> %t1
}
define <16 x i8> @test_128_i8_x_16_28_mask_lshr_4(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_28_mask_lshr_4:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $4, %xmm0
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_28_mask_lshr_4:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_28_mask_lshr_4:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $4, %xmm0
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_28_mask_lshr_4:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_28_mask_lshr_4:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $4, %xmm0
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_28_mask_lshr_4:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_28_mask_lshr_4:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $4, %xmm0
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_28_mask_lshr_4:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28>
%t1 = lshr <16 x i8> %t0, <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>
ret <16 x i8> %t1
}
define <16 x i8> @test_128_i8_x_16_224_mask_lshr_1(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_224_mask_lshr_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $1, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_224_mask_lshr_1:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_224_mask_lshr_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $1, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_224_mask_lshr_1:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_224_mask_lshr_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $1, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_224_mask_lshr_1:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_224_mask_lshr_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $1, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_224_mask_lshr_1:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224>
%t1 = lshr <16 x i8> %t0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
ret <16 x i8> %t1
}
define <16 x i8> @test_128_i8_x_16_224_mask_lshr_4(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_224_mask_lshr_4:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $4, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_224_mask_lshr_4:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_224_mask_lshr_4:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $4, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_224_mask_lshr_4:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_224_mask_lshr_4:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $4, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_224_mask_lshr_4:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_224_mask_lshr_4:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $4, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_224_mask_lshr_4:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224>
%t1 = lshr <16 x i8> %t0, <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>
ret <16 x i8> %t1
}
define <16 x i8> @test_128_i8_x_16_224_mask_lshr_5(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_224_mask_lshr_5:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: psrlw $5, %xmm0
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_224_mask_lshr_5:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpsrlw $5, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_224_mask_lshr_5:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: psrlw $5, %xmm0
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_224_mask_lshr_5:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpsrlw $5, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_224_mask_lshr_5:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: psrlw $5, %xmm0
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_224_mask_lshr_5:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpsrlw $5, %xmm0, %xmm0
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_224_mask_lshr_5:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: psrlw $5, %xmm0
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_224_mask_lshr_5:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpsrlw $5, %xmm0, %xmm0
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224>
%t1 = lshr <16 x i8> %t0, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
ret <16 x i8> %t1
}
define <16 x i8> @test_128_i8_x_16_224_mask_lshr_6(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_224_mask_lshr_6:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: psrlw $6, %xmm0
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_224_mask_lshr_6:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpsrlw $6, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_224_mask_lshr_6:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: psrlw $6, %xmm0
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_224_mask_lshr_6:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpsrlw $6, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_224_mask_lshr_6:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: psrlw $6, %xmm0
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_224_mask_lshr_6:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpsrlw $6, %xmm0, %xmm0
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_224_mask_lshr_6:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: psrlw $6, %xmm0
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_224_mask_lshr_6:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpsrlw $6, %xmm0, %xmm0
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224>
%t1 = lshr <16 x i8> %t0, <i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6>
ret <16 x i8> %t1
@@ -284,315 +284,315 @@ define <16 x i8> @test_128_i8_x_16_224_mask_lshr_6(<16 x i8> %a0) {
; ashr
define <16 x i8> @test_128_i8_x_16_7_mask_ashr_1(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_7_mask_ashr_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $1, %xmm0
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_7_mask_ashr_1:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_7_mask_ashr_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $1, %xmm0
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_7_mask_ashr_1:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_7_mask_ashr_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $1, %xmm0
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_7_mask_ashr_1:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_7_mask_ashr_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $1, %xmm0
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_7_mask_ashr_1:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
%t1 = ashr <16 x i8> %t0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
ret <16 x i8> %t1
}
define <16 x i8> @test_128_i8_x_16_28_mask_ashr_1(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_28_mask_ashr_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $1, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_28_mask_ashr_1:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_28_mask_ashr_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $1, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_28_mask_ashr_1:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_28_mask_ashr_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $1, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_28_mask_ashr_1:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_28_mask_ashr_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $1, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_28_mask_ashr_1:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28>
%t1 = ashr <16 x i8> %t0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
ret <16 x i8> %t1
}
define <16 x i8> @test_128_i8_x_16_28_mask_ashr_2(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_28_mask_ashr_2:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $2, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_28_mask_ashr_2:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $2, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_28_mask_ashr_2:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $2, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_28_mask_ashr_2:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $2, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_28_mask_ashr_2:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $2, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_28_mask_ashr_2:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $2, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_28_mask_ashr_2:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $2, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_28_mask_ashr_2:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $2, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28>
%t1 = ashr <16 x i8> %t0, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>
ret <16 x i8> %t1
}
define <16 x i8> @test_128_i8_x_16_28_mask_ashr_3(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_28_mask_ashr_3:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $3, %xmm0
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_28_mask_ashr_3:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $3, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_28_mask_ashr_3:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $3, %xmm0
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_28_mask_ashr_3:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $3, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_28_mask_ashr_3:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $3, %xmm0
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_28_mask_ashr_3:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $3, %xmm0, %xmm0
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_28_mask_ashr_3:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $3, %xmm0
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_28_mask_ashr_3:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $3, %xmm0, %xmm0
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28>
%t1 = ashr <16 x i8> %t0, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>
ret <16 x i8> %t1
}
define <16 x i8> @test_128_i8_x_16_28_mask_ashr_4(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_28_mask_ashr_4:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $4, %xmm0
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_28_mask_ashr_4:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_28_mask_ashr_4:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $4, %xmm0
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_28_mask_ashr_4:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_28_mask_ashr_4:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $4, %xmm0
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_28_mask_ashr_4:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_28_mask_ashr_4:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $4, %xmm0
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_28_mask_ashr_4:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28>
%t1 = ashr <16 x i8> %t0, <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>
ret <16 x i8> %t1
}
define <16 x i8> @test_128_i8_x_16_224_mask_ashr_1(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_224_mask_ashr_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $1, %xmm0
-; X32-SSE2ONLY-NEXT: movdqa {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]
-; X32-SSE2ONLY-NEXT: pxor %xmm1, %xmm0
-; X32-SSE2ONLY-NEXT: psubb %xmm1, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_224_mask_ashr_1:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]
-; X32-SSE2AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsubb %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_224_mask_ashr_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $1, %xmm0
-; X64-SSE2ONLY-NEXT: movdqa {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]
-; X64-SSE2ONLY-NEXT: pxor %xmm1, %xmm0
-; X64-SSE2ONLY-NEXT: psubb %xmm1, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_224_mask_ashr_1:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]
-; X64-SSE2AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsubb %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_224_mask_ashr_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $1, %xmm0
+; X86-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]
+; X86-SSE2-NEXT: pxor %xmm1, %xmm0
+; X86-SSE2-NEXT: psubb %xmm1, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_224_mask_ashr_1:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
+; X86-AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]
+; X86-AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsubb %xmm1, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_224_mask_ashr_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $1, %xmm0
+; X64-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]
+; X64-SSE2-NEXT: pxor %xmm1, %xmm0
+; X64-SSE2-NEXT: psubb %xmm1, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_224_mask_ashr_1:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
+; X64-AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]
+; X64-AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
+; X64-AVX-NEXT: vpsubb %xmm1, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224>
%t1 = ashr <16 x i8> %t0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
ret <16 x i8> %t1
}
define <16 x i8> @test_128_i8_x_16_224_mask_ashr_4(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_224_mask_ashr_4:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $4, %xmm0
-; X32-SSE2ONLY-NEXT: movdqa {{.*#+}} xmm1 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
-; X32-SSE2ONLY-NEXT: pxor %xmm1, %xmm0
-; X32-SSE2ONLY-NEXT: psubb %xmm1, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_224_mask_ashr_4:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
-; X32-SSE2AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsubb %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_224_mask_ashr_4:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $4, %xmm0
-; X64-SSE2ONLY-NEXT: movdqa {{.*#+}} xmm1 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
-; X64-SSE2ONLY-NEXT: pxor %xmm1, %xmm0
-; X64-SSE2ONLY-NEXT: psubb %xmm1, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_224_mask_ashr_4:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
-; X64-SSE2AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsubb %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_224_mask_ashr_4:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $4, %xmm0
+; X86-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
+; X86-SSE2-NEXT: pxor %xmm1, %xmm0
+; X86-SSE2-NEXT: psubb %xmm1, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_224_mask_ashr_4:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
+; X86-AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
+; X86-AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsubb %xmm1, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_224_mask_ashr_4:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $4, %xmm0
+; X64-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
+; X64-SSE2-NEXT: pxor %xmm1, %xmm0
+; X64-SSE2-NEXT: psubb %xmm1, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_224_mask_ashr_4:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
+; X64-AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
+; X64-AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
+; X64-AVX-NEXT: vpsubb %xmm1, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224>
%t1 = ashr <16 x i8> %t0, <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>
ret <16 x i8> %t1
}
define <16 x i8> @test_128_i8_x_16_224_mask_ashr_5(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_224_mask_ashr_5:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: psrlw $5, %xmm0
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: movdqa {{.*#+}} xmm1 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4]
-; X32-SSE2ONLY-NEXT: pxor %xmm1, %xmm0
-; X32-SSE2ONLY-NEXT: psubb %xmm1, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_224_mask_ashr_5:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpsrlw $5, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4]
-; X32-SSE2AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsubb %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_224_mask_ashr_5:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: psrlw $5, %xmm0
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: movdqa {{.*#+}} xmm1 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4]
-; X64-SSE2ONLY-NEXT: pxor %xmm1, %xmm0
-; X64-SSE2ONLY-NEXT: psubb %xmm1, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_224_mask_ashr_5:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpsrlw $5, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4]
-; X64-SSE2AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsubb %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_224_mask_ashr_5:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: psrlw $5, %xmm0
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4]
+; X86-SSE2-NEXT: pxor %xmm1, %xmm0
+; X86-SSE2-NEXT: psubb %xmm1, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_224_mask_ashr_5:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpsrlw $5, %xmm0, %xmm0
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4]
+; X86-AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsubb %xmm1, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_224_mask_ashr_5:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: psrlw $5, %xmm0
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4]
+; X64-SSE2-NEXT: pxor %xmm1, %xmm0
+; X64-SSE2-NEXT: psubb %xmm1, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_224_mask_ashr_5:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpsrlw $5, %xmm0, %xmm0
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4]
+; X64-AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
+; X64-AVX-NEXT: vpsubb %xmm1, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224>
%t1 = ashr <16 x i8> %t0, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
ret <16 x i8> %t1
}
define <16 x i8> @test_128_i8_x_16_224_mask_ashr_6(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_224_mask_ashr_6:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: psrlw $6, %xmm0
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: movdqa {{.*#+}} xmm1 = [2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2]
-; X32-SSE2ONLY-NEXT: pxor %xmm1, %xmm0
-; X32-SSE2ONLY-NEXT: psubb %xmm1, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_224_mask_ashr_6:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpsrlw $6, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2]
-; X32-SSE2AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsubb %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_224_mask_ashr_6:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: psrlw $6, %xmm0
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: movdqa {{.*#+}} xmm1 = [2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2]
-; X64-SSE2ONLY-NEXT: pxor %xmm1, %xmm0
-; X64-SSE2ONLY-NEXT: psubb %xmm1, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_224_mask_ashr_6:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpsrlw $6, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2]
-; X64-SSE2AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsubb %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_224_mask_ashr_6:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: psrlw $6, %xmm0
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2]
+; X86-SSE2-NEXT: pxor %xmm1, %xmm0
+; X86-SSE2-NEXT: psubb %xmm1, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_224_mask_ashr_6:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpsrlw $6, %xmm0, %xmm0
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2]
+; X86-AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsubb %xmm1, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_224_mask_ashr_6:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: psrlw $6, %xmm0
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2]
+; X64-SSE2-NEXT: pxor %xmm1, %xmm0
+; X64-SSE2-NEXT: psubb %xmm1, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_224_mask_ashr_6:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpsrlw $6, %xmm0, %xmm0
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2]
+; X64-AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
+; X64-AVX-NEXT: vpsubb %xmm1, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224>
%t1 = ashr <16 x i8> %t0, <i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6>
ret <16 x i8> %t1
@@ -601,259 +601,259 @@ define <16 x i8> @test_128_i8_x_16_224_mask_ashr_6(<16 x i8> %a0) {
; shl
define <16 x i8> @test_128_i8_x_16_7_mask_shl_1(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_7_mask_shl_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: paddb %xmm0, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_7_mask_shl_1:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpaddb %xmm0, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_7_mask_shl_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: paddb %xmm0, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_7_mask_shl_1:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpaddb %xmm0, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_7_mask_shl_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: paddb %xmm0, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_7_mask_shl_1:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpaddb %xmm0, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_7_mask_shl_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: paddb %xmm0, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_7_mask_shl_1:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpaddb %xmm0, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
%t1 = shl <16 x i8> %t0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
ret <16 x i8> %t1
}
define <16 x i8> @test_128_i8_x_16_7_mask_shl_4(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_7_mask_shl_4:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psllw $4, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_7_mask_shl_4:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsllw $4, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_7_mask_shl_4:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psllw $4, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_7_mask_shl_4:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsllw $4, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_7_mask_shl_4:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psllw $4, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_7_mask_shl_4:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsllw $4, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_7_mask_shl_4:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psllw $4, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_7_mask_shl_4:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsllw $4, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
%t1 = shl <16 x i8> %t0, <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>
ret <16 x i8> %t1
}
define <16 x i8> @test_128_i8_x_16_7_mask_shl_5(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_7_mask_shl_5:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: psllw $5, %xmm0
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_7_mask_shl_5:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpsllw $5, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_7_mask_shl_5:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: psllw $5, %xmm0
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_7_mask_shl_5:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpsllw $5, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_7_mask_shl_5:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: psllw $5, %xmm0
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_7_mask_shl_5:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpsllw $5, %xmm0, %xmm0
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_7_mask_shl_5:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: psllw $5, %xmm0
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_7_mask_shl_5:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpsllw $5, %xmm0, %xmm0
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
%t1 = shl <16 x i8> %t0, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
ret <16 x i8> %t1
}
define <16 x i8> @test_128_i8_x_16_7_mask_shl_6(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_7_mask_shl_6:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: psllw $6, %xmm0
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_7_mask_shl_6:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpsllw $6, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_7_mask_shl_6:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: psllw $6, %xmm0
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_7_mask_shl_6:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpsllw $6, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_7_mask_shl_6:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: psllw $6, %xmm0
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_7_mask_shl_6:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpsllw $6, %xmm0, %xmm0
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_7_mask_shl_6:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: psllw $6, %xmm0
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_7_mask_shl_6:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpsllw $6, %xmm0, %xmm0
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
%t1 = shl <16 x i8> %t0, <i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6>
ret <16 x i8> %t1
}
define <16 x i8> @test_128_i8_x_16_28_mask_shl_1(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_28_mask_shl_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: paddb %xmm0, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_28_mask_shl_1:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpaddb %xmm0, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_28_mask_shl_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: paddb %xmm0, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_28_mask_shl_1:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpaddb %xmm0, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_28_mask_shl_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: paddb %xmm0, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_28_mask_shl_1:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpaddb %xmm0, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_28_mask_shl_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: paddb %xmm0, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_28_mask_shl_1:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpaddb %xmm0, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28>
%t1 = shl <16 x i8> %t0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
ret <16 x i8> %t1
}
define <16 x i8> @test_128_i8_x_16_28_mask_shl_2(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_28_mask_shl_2:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psllw $2, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_28_mask_shl_2:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsllw $2, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_28_mask_shl_2:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psllw $2, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_28_mask_shl_2:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsllw $2, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_28_mask_shl_2:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psllw $2, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_28_mask_shl_2:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsllw $2, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_28_mask_shl_2:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psllw $2, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_28_mask_shl_2:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsllw $2, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28>
%t1 = shl <16 x i8> %t0, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>
ret <16 x i8> %t1
}
define <16 x i8> @test_128_i8_x_16_28_mask_shl_3(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_28_mask_shl_3:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psllw $3, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_28_mask_shl_3:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsllw $3, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_28_mask_shl_3:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psllw $3, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_28_mask_shl_3:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsllw $3, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_28_mask_shl_3:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psllw $3, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_28_mask_shl_3:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsllw $3, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_28_mask_shl_3:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psllw $3, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_28_mask_shl_3:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsllw $3, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28>
%t1 = shl <16 x i8> %t0, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>
ret <16 x i8> %t1
}
define <16 x i8> @test_128_i8_x_16_28_mask_shl_4(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_28_mask_shl_4:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psllw $4, %xmm0
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_28_mask_shl_4:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsllw $4, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_28_mask_shl_4:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psllw $4, %xmm0
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_28_mask_shl_4:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsllw $4, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_28_mask_shl_4:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psllw $4, %xmm0
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_28_mask_shl_4:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsllw $4, %xmm0, %xmm0
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_28_mask_shl_4:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psllw $4, %xmm0
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_28_mask_shl_4:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsllw $4, %xmm0, %xmm0
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28, i8 28>
%t1 = shl <16 x i8> %t0, <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>
ret <16 x i8> %t1
}
define <16 x i8> @test_128_i8_x_16_224_mask_shl_1(<16 x i8> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i8_x_16_224_mask_shl_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: paddb %xmm0, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i8_x_16_224_mask_shl_1:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpaddb %xmm0, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i8_x_16_224_mask_shl_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: paddb %xmm0, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i8_x_16_224_mask_shl_1:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpaddb %xmm0, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i8_x_16_224_mask_shl_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: paddb %xmm0, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i8_x_16_224_mask_shl_1:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpaddb %xmm0, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i8_x_16_224_mask_shl_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: paddb %xmm0, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i8_x_16_224_mask_shl_1:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpaddb %xmm0, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <16 x i8> %a0, <i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224, i8 224>
%t1 = shl <16 x i8> %t0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
ret <16 x i8> %t1
@@ -866,247 +866,247 @@ define <16 x i8> @test_128_i8_x_16_224_mask_shl_1(<16 x i8> %a0) {
; lshr
define <8 x i16> @test_128_i16_x_8_127_mask_lshr_1(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_127_mask_lshr_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $1, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_127_mask_lshr_1:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_127_mask_lshr_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $1, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_127_mask_lshr_1:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_127_mask_lshr_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $1, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_127_mask_lshr_1:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_127_mask_lshr_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $1, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_127_mask_lshr_1:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>
%t1 = lshr <8 x i16> %t0, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
ret <8 x i16> %t1
}
define <8 x i16> @test_128_i16_x_8_2032_mask_lshr_3(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_2032_mask_lshr_3:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $3, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_2032_mask_lshr_3:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $3, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_2032_mask_lshr_3:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $3, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_2032_mask_lshr_3:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $3, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_2032_mask_lshr_3:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $3, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_2032_mask_lshr_3:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $3, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_2032_mask_lshr_3:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $3, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_2032_mask_lshr_3:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $3, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032>
%t1 = lshr <8 x i16> %t0, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
ret <8 x i16> %t1
}
define <8 x i16> @test_128_i16_x_8_2032_mask_lshr_4(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_2032_mask_lshr_4:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $4, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_2032_mask_lshr_4:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_2032_mask_lshr_4:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $4, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_2032_mask_lshr_4:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_2032_mask_lshr_4:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $4, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_2032_mask_lshr_4:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_2032_mask_lshr_4:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $4, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_2032_mask_lshr_4:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032>
%t1 = lshr <8 x i16> %t0, <i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4>
ret <8 x i16> %t1
}
define <8 x i16> @test_128_i16_x_8_2032_mask_lshr_5(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_2032_mask_lshr_5:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $5, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_2032_mask_lshr_5:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $5, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_2032_mask_lshr_5:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $5, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_2032_mask_lshr_5:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $5, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_2032_mask_lshr_5:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $5, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_2032_mask_lshr_5:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $5, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_2032_mask_lshr_5:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $5, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_2032_mask_lshr_5:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $5, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032>
%t1 = lshr <8 x i16> %t0, <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
ret <8 x i16> %t1
}
define <8 x i16> @test_128_i16_x_8_2032_mask_lshr_6(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_2032_mask_lshr_6:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $6, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_2032_mask_lshr_6:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $6, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_2032_mask_lshr_6:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $6, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_2032_mask_lshr_6:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $6, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_2032_mask_lshr_6:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $6, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_2032_mask_lshr_6:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $6, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_2032_mask_lshr_6:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $6, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_2032_mask_lshr_6:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $6, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032>
%t1 = lshr <8 x i16> %t0, <i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6>
ret <8 x i16> %t1
}
define <8 x i16> @test_128_i16_x_8_65024_mask_lshr_1(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_65024_mask_lshr_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $1, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_65024_mask_lshr_1:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_65024_mask_lshr_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $1, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_65024_mask_lshr_1:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_65024_mask_lshr_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $1, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_65024_mask_lshr_1:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_65024_mask_lshr_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $1, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_65024_mask_lshr_1:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024>
%t1 = lshr <8 x i16> %t0, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
ret <8 x i16> %t1
}
define <8 x i16> @test_128_i16_x_8_65024_mask_lshr_8(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_65024_mask_lshr_8:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $8, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_65024_mask_lshr_8:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $8, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_65024_mask_lshr_8:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $8, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_65024_mask_lshr_8:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $8, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_65024_mask_lshr_8:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $8, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_65024_mask_lshr_8:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $8, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_65024_mask_lshr_8:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $8, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_65024_mask_lshr_8:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $8, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024>
%t1 = lshr <8 x i16> %t0, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
ret <8 x i16> %t1
}
define <8 x i16> @test_128_i16_x_8_65024_mask_lshr_9(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_65024_mask_lshr_9:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: psrlw $9, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_65024_mask_lshr_9:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpsrlw $9, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_65024_mask_lshr_9:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: psrlw $9, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_65024_mask_lshr_9:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpsrlw $9, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_65024_mask_lshr_9:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: psrlw $9, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_65024_mask_lshr_9:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpsrlw $9, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_65024_mask_lshr_9:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: psrlw $9, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_65024_mask_lshr_9:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpsrlw $9, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024>
%t1 = lshr <8 x i16> %t0, <i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9>
ret <8 x i16> %t1
}
define <8 x i16> @test_128_i16_x_8_65024_mask_lshr_10(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_65024_mask_lshr_10:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: psrlw $10, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_65024_mask_lshr_10:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpsrlw $10, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_65024_mask_lshr_10:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: psrlw $10, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_65024_mask_lshr_10:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpsrlw $10, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_65024_mask_lshr_10:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: psrlw $10, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_65024_mask_lshr_10:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpsrlw $10, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_65024_mask_lshr_10:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: psrlw $10, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_65024_mask_lshr_10:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpsrlw $10, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024>
%t1 = lshr <8 x i16> %t0, <i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10>
ret <8 x i16> %t1
@@ -1115,247 +1115,247 @@ define <8 x i16> @test_128_i16_x_8_65024_mask_lshr_10(<8 x i16> %a0) {
; ashr
define <8 x i16> @test_128_i16_x_8_127_mask_ashr_1(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_127_mask_ashr_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $1, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_127_mask_ashr_1:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_127_mask_ashr_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $1, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_127_mask_ashr_1:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_127_mask_ashr_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $1, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_127_mask_ashr_1:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_127_mask_ashr_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $1, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_127_mask_ashr_1:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $1, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>
%t1 = ashr <8 x i16> %t0, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
ret <8 x i16> %t1
}
define <8 x i16> @test_128_i16_x_8_2032_mask_ashr_3(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_2032_mask_ashr_3:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $3, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_2032_mask_ashr_3:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $3, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_2032_mask_ashr_3:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $3, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_2032_mask_ashr_3:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $3, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_2032_mask_ashr_3:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $3, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_2032_mask_ashr_3:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $3, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_2032_mask_ashr_3:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $3, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_2032_mask_ashr_3:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $3, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032>
%t1 = ashr <8 x i16> %t0, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
ret <8 x i16> %t1
}
define <8 x i16> @test_128_i16_x_8_2032_mask_ashr_4(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_2032_mask_ashr_4:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $4, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_2032_mask_ashr_4:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_2032_mask_ashr_4:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $4, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_2032_mask_ashr_4:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_2032_mask_ashr_4:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $4, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_2032_mask_ashr_4:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_2032_mask_ashr_4:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $4, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_2032_mask_ashr_4:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032>
%t1 = ashr <8 x i16> %t0, <i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4>
ret <8 x i16> %t1
}
define <8 x i16> @test_128_i16_x_8_2032_mask_ashr_5(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_2032_mask_ashr_5:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $5, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_2032_mask_ashr_5:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $5, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_2032_mask_ashr_5:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $5, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_2032_mask_ashr_5:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $5, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_2032_mask_ashr_5:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $5, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_2032_mask_ashr_5:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $5, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_2032_mask_ashr_5:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $5, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_2032_mask_ashr_5:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $5, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032>
%t1 = ashr <8 x i16> %t0, <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
ret <8 x i16> %t1
}
define <8 x i16> @test_128_i16_x_8_2032_mask_ashr_6(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_2032_mask_ashr_6:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlw $6, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_2032_mask_ashr_6:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlw $6, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_2032_mask_ashr_6:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlw $6, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_2032_mask_ashr_6:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlw $6, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_2032_mask_ashr_6:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlw $6, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_2032_mask_ashr_6:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlw $6, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_2032_mask_ashr_6:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlw $6, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_2032_mask_ashr_6:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlw $6, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032>
%t1 = ashr <8 x i16> %t0, <i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6>
ret <8 x i16> %t1
}
define <8 x i16> @test_128_i16_x_8_65024_mask_ashr_1(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_65024_mask_ashr_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psraw $1, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_65024_mask_ashr_1:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsraw $1, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_65024_mask_ashr_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psraw $1, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_65024_mask_ashr_1:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsraw $1, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_65024_mask_ashr_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psraw $1, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_65024_mask_ashr_1:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsraw $1, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_65024_mask_ashr_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psraw $1, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_65024_mask_ashr_1:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsraw $1, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024>
%t1 = ashr <8 x i16> %t0, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
ret <8 x i16> %t1
}
define <8 x i16> @test_128_i16_x_8_65024_mask_ashr_8(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_65024_mask_ashr_8:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psraw $8, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_65024_mask_ashr_8:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsraw $8, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_65024_mask_ashr_8:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psraw $8, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_65024_mask_ashr_8:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsraw $8, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_65024_mask_ashr_8:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psraw $8, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_65024_mask_ashr_8:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsraw $8, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_65024_mask_ashr_8:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psraw $8, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_65024_mask_ashr_8:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsraw $8, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024>
%t1 = ashr <8 x i16> %t0, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
ret <8 x i16> %t1
}
define <8 x i16> @test_128_i16_x_8_65024_mask_ashr_9(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_65024_mask_ashr_9:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: psraw $9, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_65024_mask_ashr_9:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpsraw $9, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_65024_mask_ashr_9:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: psraw $9, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_65024_mask_ashr_9:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpsraw $9, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_65024_mask_ashr_9:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: psraw $9, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_65024_mask_ashr_9:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpsraw $9, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_65024_mask_ashr_9:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: psraw $9, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_65024_mask_ashr_9:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpsraw $9, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024>
%t1 = ashr <8 x i16> %t0, <i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9>
ret <8 x i16> %t1
}
define <8 x i16> @test_128_i16_x_8_65024_mask_ashr_10(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_65024_mask_ashr_10:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: psraw $10, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_65024_mask_ashr_10:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpsraw $10, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_65024_mask_ashr_10:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: psraw $10, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_65024_mask_ashr_10:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpsraw $10, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_65024_mask_ashr_10:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: psraw $10, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_65024_mask_ashr_10:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpsraw $10, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_65024_mask_ashr_10:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: psraw $10, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_65024_mask_ashr_10:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpsraw $10, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024>
%t1 = ashr <8 x i16> %t0, <i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10>
ret <8 x i16> %t1
@@ -1364,247 +1364,247 @@ define <8 x i16> @test_128_i16_x_8_65024_mask_ashr_10(<8 x i16> %a0) {
; shl
define <8 x i16> @test_128_i16_x_8_127_mask_shl_1(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_127_mask_shl_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: paddw %xmm0, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_127_mask_shl_1:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpaddw %xmm0, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_127_mask_shl_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: paddw %xmm0, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_127_mask_shl_1:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpaddw %xmm0, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_127_mask_shl_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: paddw %xmm0, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_127_mask_shl_1:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpaddw %xmm0, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_127_mask_shl_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: paddw %xmm0, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_127_mask_shl_1:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpaddw %xmm0, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>
%t1 = shl <8 x i16> %t0, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
ret <8 x i16> %t1
}
define <8 x i16> @test_128_i16_x_8_127_mask_shl_8(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_127_mask_shl_8:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psllw $8, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_127_mask_shl_8:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsllw $8, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_127_mask_shl_8:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psllw $8, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_127_mask_shl_8:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsllw $8, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_127_mask_shl_8:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psllw $8, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_127_mask_shl_8:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsllw $8, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_127_mask_shl_8:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psllw $8, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_127_mask_shl_8:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsllw $8, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>
%t1 = shl <8 x i16> %t0, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
ret <8 x i16> %t1
}
define <8 x i16> @test_128_i16_x_8_127_mask_shl_9(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_127_mask_shl_9:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: psllw $9, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_127_mask_shl_9:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpsllw $9, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_127_mask_shl_9:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: psllw $9, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_127_mask_shl_9:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpsllw $9, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_127_mask_shl_9:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: psllw $9, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_127_mask_shl_9:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpsllw $9, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_127_mask_shl_9:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: psllw $9, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_127_mask_shl_9:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpsllw $9, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>
%t1 = shl <8 x i16> %t0, <i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9>
ret <8 x i16> %t1
}
define <8 x i16> @test_128_i16_x_8_127_mask_shl_10(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_127_mask_shl_10:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: psllw $10, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_127_mask_shl_10:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpsllw $10, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_127_mask_shl_10:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: psllw $10, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_127_mask_shl_10:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpsllw $10, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_127_mask_shl_10:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: psllw $10, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_127_mask_shl_10:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpsllw $10, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_127_mask_shl_10:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: psllw $10, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_127_mask_shl_10:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpsllw $10, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>
%t1 = shl <8 x i16> %t0, <i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10>
ret <8 x i16> %t1
}
define <8 x i16> @test_128_i16_x_8_2032_mask_shl_3(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_2032_mask_shl_3:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psllw $3, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_2032_mask_shl_3:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsllw $3, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_2032_mask_shl_3:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psllw $3, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_2032_mask_shl_3:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsllw $3, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_2032_mask_shl_3:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psllw $3, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_2032_mask_shl_3:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsllw $3, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_2032_mask_shl_3:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psllw $3, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_2032_mask_shl_3:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsllw $3, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032>
%t1 = shl <8 x i16> %t0, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
ret <8 x i16> %t1
}
define <8 x i16> @test_128_i16_x_8_2032_mask_shl_4(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_2032_mask_shl_4:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psllw $4, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_2032_mask_shl_4:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsllw $4, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_2032_mask_shl_4:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psllw $4, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_2032_mask_shl_4:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsllw $4, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_2032_mask_shl_4:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psllw $4, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_2032_mask_shl_4:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsllw $4, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_2032_mask_shl_4:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psllw $4, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_2032_mask_shl_4:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsllw $4, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032>
%t1 = shl <8 x i16> %t0, <i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4>
ret <8 x i16> %t1
}
define <8 x i16> @test_128_i16_x_8_2032_mask_shl_5(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_2032_mask_shl_5:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psllw $5, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_2032_mask_shl_5:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsllw $5, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_2032_mask_shl_5:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psllw $5, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_2032_mask_shl_5:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsllw $5, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_2032_mask_shl_5:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psllw $5, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_2032_mask_shl_5:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsllw $5, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_2032_mask_shl_5:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psllw $5, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_2032_mask_shl_5:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsllw $5, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032>
%t1 = shl <8 x i16> %t0, <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
ret <8 x i16> %t1
}
define <8 x i16> @test_128_i16_x_8_2032_mask_shl_6(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_2032_mask_shl_6:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psllw $6, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_2032_mask_shl_6:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsllw $6, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_2032_mask_shl_6:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psllw $6, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_2032_mask_shl_6:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsllw $6, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_2032_mask_shl_6:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psllw $6, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_2032_mask_shl_6:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsllw $6, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_2032_mask_shl_6:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psllw $6, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_2032_mask_shl_6:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsllw $6, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032, i16 2032>
%t1 = shl <8 x i16> %t0, <i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6>
ret <8 x i16> %t1
}
define <8 x i16> @test_128_i16_x_8_65024_mask_shl_1(<8 x i16> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i16_x_8_65024_mask_shl_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: paddw %xmm0, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i16_x_8_65024_mask_shl_1:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpaddw %xmm0, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i16_x_8_65024_mask_shl_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: paddw %xmm0, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i16_x_8_65024_mask_shl_1:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpaddw %xmm0, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i16_x_8_65024_mask_shl_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: paddw %xmm0, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i16_x_8_65024_mask_shl_1:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpaddw %xmm0, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i16_x_8_65024_mask_shl_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: paddw %xmm0, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i16_x_8_65024_mask_shl_1:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpaddw %xmm0, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <8 x i16> %a0, <i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024, i16 65024>
%t1 = shl <8 x i16> %t0, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
ret <8 x i16> %t1
@@ -1617,345 +1617,345 @@ define <8 x i16> @test_128_i16_x_8_65024_mask_shl_1(<8 x i16> %a0) {
; lshr
define <4 x i32> @test_128_i32_x_4_32767_mask_lshr_1(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_32767_mask_lshr_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrld $1, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i32_x_4_32767_mask_lshr_1:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpsrld $1, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_32767_mask_lshr_1:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [32767,32767,32767,32767]
-; X32-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpsrld $1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_32767_mask_lshr_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrld $1, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i32_x_4_32767_mask_lshr_1:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpsrld $1, %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_32767_mask_lshr_1:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [32767,32767,32767,32767]
-; X64-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpsrld $1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_32767_mask_lshr_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrld $1, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i32_x_4_32767_mask_lshr_1:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpsrld $1, %xmm0, %xmm0
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i32_x_4_32767_mask_lshr_1:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [32767,32767,32767,32767]
+; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpsrld $1, %xmm0, %xmm0
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_32767_mask_lshr_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrld $1, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i32_x_4_32767_mask_lshr_1:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX1-NEXT: vpsrld $1, %xmm0, %xmm0
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i32_x_4_32767_mask_lshr_1:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [32767,32767,32767,32767]
+; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vpsrld $1, %xmm0, %xmm0
+; X64-AVX2-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 32767, i32 32767, i32 32767, i32 32767>
%t1 = lshr <4 x i32> %t0, <i32 1, i32 1, i32 1, i32 1>
ret <4 x i32> %t1
}
define <4 x i32> @test_128_i32_x_4_8388352_mask_lshr_7(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_8388352_mask_lshr_7:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrld $7, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i32_x_4_8388352_mask_lshr_7:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpsrld $7, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_8388352_mask_lshr_7:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
-; X32-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpsrld $7, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_8388352_mask_lshr_7:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrld $7, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i32_x_4_8388352_mask_lshr_7:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpsrld $7, %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_8388352_mask_lshr_7:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
-; X64-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpsrld $7, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_8388352_mask_lshr_7:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrld $7, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i32_x_4_8388352_mask_lshr_7:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpsrld $7, %xmm0, %xmm0
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i32_x_4_8388352_mask_lshr_7:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
+; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpsrld $7, %xmm0, %xmm0
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_8388352_mask_lshr_7:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrld $7, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i32_x_4_8388352_mask_lshr_7:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX1-NEXT: vpsrld $7, %xmm0, %xmm0
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i32_x_4_8388352_mask_lshr_7:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
+; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vpsrld $7, %xmm0, %xmm0
+; X64-AVX2-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 8388352, i32 8388352, i32 8388352, i32 8388352>
%t1 = lshr <4 x i32> %t0, <i32 7, i32 7, i32 7, i32 7>
ret <4 x i32> %t1
}
define <4 x i32> @test_128_i32_x_4_8388352_mask_lshr_8(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_8388352_mask_lshr_8:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrld $8, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i32_x_4_8388352_mask_lshr_8:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpsrld $8, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_8388352_mask_lshr_8:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
-; X32-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpsrld $8, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_8388352_mask_lshr_8:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrld $8, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i32_x_4_8388352_mask_lshr_8:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpsrld $8, %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_8388352_mask_lshr_8:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
-; X64-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpsrld $8, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_8388352_mask_lshr_8:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrld $8, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i32_x_4_8388352_mask_lshr_8:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpsrld $8, %xmm0, %xmm0
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i32_x_4_8388352_mask_lshr_8:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
+; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpsrld $8, %xmm0, %xmm0
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_8388352_mask_lshr_8:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrld $8, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i32_x_4_8388352_mask_lshr_8:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX1-NEXT: vpsrld $8, %xmm0, %xmm0
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i32_x_4_8388352_mask_lshr_8:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
+; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vpsrld $8, %xmm0, %xmm0
+; X64-AVX2-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 8388352, i32 8388352, i32 8388352, i32 8388352>
%t1 = lshr <4 x i32> %t0, <i32 8, i32 8, i32 8, i32 8>
ret <4 x i32> %t1
}
define <4 x i32> @test_128_i32_x_4_8388352_mask_lshr_9(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_8388352_mask_lshr_9:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrld $9, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i32_x_4_8388352_mask_lshr_9:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpsrld $9, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_8388352_mask_lshr_9:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
-; X32-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpsrld $9, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_8388352_mask_lshr_9:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrld $9, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i32_x_4_8388352_mask_lshr_9:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpsrld $9, %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_8388352_mask_lshr_9:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
-; X64-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpsrld $9, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_8388352_mask_lshr_9:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrld $9, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i32_x_4_8388352_mask_lshr_9:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpsrld $9, %xmm0, %xmm0
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i32_x_4_8388352_mask_lshr_9:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
+; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpsrld $9, %xmm0, %xmm0
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_8388352_mask_lshr_9:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrld $9, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i32_x_4_8388352_mask_lshr_9:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX1-NEXT: vpsrld $9, %xmm0, %xmm0
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i32_x_4_8388352_mask_lshr_9:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
+; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vpsrld $9, %xmm0, %xmm0
+; X64-AVX2-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 8388352, i32 8388352, i32 8388352, i32 8388352>
%t1 = lshr <4 x i32> %t0, <i32 9, i32 9, i32 9, i32 9>
ret <4 x i32> %t1
}
define <4 x i32> @test_128_i32_x_4_8388352_mask_lshr_10(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_8388352_mask_lshr_10:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrld $10, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i32_x_4_8388352_mask_lshr_10:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpsrld $10, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_8388352_mask_lshr_10:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
-; X32-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpsrld $10, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_8388352_mask_lshr_10:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrld $10, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i32_x_4_8388352_mask_lshr_10:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpsrld $10, %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_8388352_mask_lshr_10:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
-; X64-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpsrld $10, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_8388352_mask_lshr_10:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrld $10, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i32_x_4_8388352_mask_lshr_10:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpsrld $10, %xmm0, %xmm0
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i32_x_4_8388352_mask_lshr_10:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
+; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpsrld $10, %xmm0, %xmm0
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_8388352_mask_lshr_10:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrld $10, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i32_x_4_8388352_mask_lshr_10:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX1-NEXT: vpsrld $10, %xmm0, %xmm0
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i32_x_4_8388352_mask_lshr_10:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
+; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vpsrld $10, %xmm0, %xmm0
+; X64-AVX2-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 8388352, i32 8388352, i32 8388352, i32 8388352>
%t1 = lshr <4 x i32> %t0, <i32 10, i32 10, i32 10, i32 10>
ret <4 x i32> %t1
}
define <4 x i32> @test_128_i32_x_4_4294836224_mask_lshr_1(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_4294836224_mask_lshr_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrld $1, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i32_x_4_4294836224_mask_lshr_1:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpsrld $1, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_1:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294836224,4294836224,4294836224,4294836224]
-; X32-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpsrld $1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_4294836224_mask_lshr_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrld $1, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i32_x_4_4294836224_mask_lshr_1:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpsrld $1, %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_1:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294836224,4294836224,4294836224,4294836224]
-; X64-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpsrld $1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrld $1, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i32_x_4_4294836224_mask_lshr_1:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpsrld $1, %xmm0, %xmm0
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_1:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294836224,4294836224,4294836224,4294836224]
+; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpsrld $1, %xmm0, %xmm0
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrld $1, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i32_x_4_4294836224_mask_lshr_1:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX1-NEXT: vpsrld $1, %xmm0, %xmm0
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_1:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294836224,4294836224,4294836224,4294836224]
+; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vpsrld $1, %xmm0, %xmm0
+; X64-AVX2-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 4294836224, i32 4294836224, i32 4294836224, i32 4294836224>
%t1 = lshr <4 x i32> %t0, <i32 1, i32 1, i32 1, i32 1>
ret <4 x i32> %t1
}
define <4 x i32> @test_128_i32_x_4_4294836224_mask_lshr_16(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_4294836224_mask_lshr_16:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrld $16, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i32_x_4_4294836224_mask_lshr_16:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpsrld $16, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_16:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294836224,4294836224,4294836224,4294836224]
-; X32-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpsrld $16, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_4294836224_mask_lshr_16:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrld $16, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i32_x_4_4294836224_mask_lshr_16:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpsrld $16, %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_16:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294836224,4294836224,4294836224,4294836224]
-; X64-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpsrld $16, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_16:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrld $16, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i32_x_4_4294836224_mask_lshr_16:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpsrld $16, %xmm0, %xmm0
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_16:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294836224,4294836224,4294836224,4294836224]
+; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpsrld $16, %xmm0, %xmm0
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_16:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrld $16, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i32_x_4_4294836224_mask_lshr_16:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX1-NEXT: vpsrld $16, %xmm0, %xmm0
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_16:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294836224,4294836224,4294836224,4294836224]
+; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vpsrld $16, %xmm0, %xmm0
+; X64-AVX2-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 4294836224, i32 4294836224, i32 4294836224, i32 4294836224>
%t1 = lshr <4 x i32> %t0, <i32 16, i32 16, i32 16, i32 16>
ret <4 x i32> %t1
}
define <4 x i32> @test_128_i32_x_4_4294836224_mask_lshr_17(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_4294836224_mask_lshr_17:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: psrld $17, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i32_x_4_4294836224_mask_lshr_17:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpsrld $17, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_4294836224_mask_lshr_17:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: psrld $17, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i32_x_4_4294836224_mask_lshr_17:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpsrld $17, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_17:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: psrld $17, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i32_x_4_4294836224_mask_lshr_17:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpsrld $17, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_17:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: psrld $17, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i32_x_4_4294836224_mask_lshr_17:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpsrld $17, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 4294836224, i32 4294836224, i32 4294836224, i32 4294836224>
%t1 = lshr <4 x i32> %t0, <i32 17, i32 17, i32 17, i32 17>
ret <4 x i32> %t1
}
define <4 x i32> @test_128_i32_x_4_4294836224_mask_lshr_18(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_4294836224_mask_lshr_18:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: psrld $18, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i32_x_4_4294836224_mask_lshr_18:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpsrld $18, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_4294836224_mask_lshr_18:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: psrld $18, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i32_x_4_4294836224_mask_lshr_18:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpsrld $18, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_18:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: psrld $18, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i32_x_4_4294836224_mask_lshr_18:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpsrld $18, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_lshr_18:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: psrld $18, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i32_x_4_4294836224_mask_lshr_18:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpsrld $18, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 4294836224, i32 4294836224, i32 4294836224, i32 4294836224>
%t1 = lshr <4 x i32> %t0, <i32 18, i32 18, i32 18, i32 18>
ret <4 x i32> %t1
@@ -1964,345 +1964,345 @@ define <4 x i32> @test_128_i32_x_4_4294836224_mask_lshr_18(<4 x i32> %a0) {
; ashr
define <4 x i32> @test_128_i32_x_4_32767_mask_ashr_1(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_32767_mask_ashr_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrld $1, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i32_x_4_32767_mask_ashr_1:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpsrld $1, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_32767_mask_ashr_1:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [32767,32767,32767,32767]
-; X32-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpsrld $1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_32767_mask_ashr_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrld $1, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i32_x_4_32767_mask_ashr_1:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpsrld $1, %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_32767_mask_ashr_1:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [32767,32767,32767,32767]
-; X64-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpsrld $1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_32767_mask_ashr_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrld $1, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i32_x_4_32767_mask_ashr_1:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpsrld $1, %xmm0, %xmm0
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i32_x_4_32767_mask_ashr_1:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [32767,32767,32767,32767]
+; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpsrld $1, %xmm0, %xmm0
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_32767_mask_ashr_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrld $1, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i32_x_4_32767_mask_ashr_1:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX1-NEXT: vpsrld $1, %xmm0, %xmm0
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i32_x_4_32767_mask_ashr_1:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [32767,32767,32767,32767]
+; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vpsrld $1, %xmm0, %xmm0
+; X64-AVX2-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 32767, i32 32767, i32 32767, i32 32767>
%t1 = ashr <4 x i32> %t0, <i32 1, i32 1, i32 1, i32 1>
ret <4 x i32> %t1
}
define <4 x i32> @test_128_i32_x_4_8388352_mask_ashr_7(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_8388352_mask_ashr_7:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrld $7, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i32_x_4_8388352_mask_ashr_7:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpsrld $7, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_8388352_mask_ashr_7:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
-; X32-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpsrld $7, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_8388352_mask_ashr_7:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrld $7, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i32_x_4_8388352_mask_ashr_7:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpsrld $7, %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_8388352_mask_ashr_7:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
-; X64-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpsrld $7, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_8388352_mask_ashr_7:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrld $7, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i32_x_4_8388352_mask_ashr_7:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpsrld $7, %xmm0, %xmm0
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i32_x_4_8388352_mask_ashr_7:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
+; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpsrld $7, %xmm0, %xmm0
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_8388352_mask_ashr_7:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrld $7, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i32_x_4_8388352_mask_ashr_7:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX1-NEXT: vpsrld $7, %xmm0, %xmm0
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i32_x_4_8388352_mask_ashr_7:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
+; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vpsrld $7, %xmm0, %xmm0
+; X64-AVX2-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 8388352, i32 8388352, i32 8388352, i32 8388352>
%t1 = ashr <4 x i32> %t0, <i32 7, i32 7, i32 7, i32 7>
ret <4 x i32> %t1
}
define <4 x i32> @test_128_i32_x_4_8388352_mask_ashr_8(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_8388352_mask_ashr_8:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrld $8, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i32_x_4_8388352_mask_ashr_8:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpsrld $8, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_8388352_mask_ashr_8:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
-; X32-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpsrld $8, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_8388352_mask_ashr_8:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrld $8, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i32_x_4_8388352_mask_ashr_8:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpsrld $8, %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_8388352_mask_ashr_8:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
-; X64-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpsrld $8, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_8388352_mask_ashr_8:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrld $8, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i32_x_4_8388352_mask_ashr_8:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpsrld $8, %xmm0, %xmm0
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i32_x_4_8388352_mask_ashr_8:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
+; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpsrld $8, %xmm0, %xmm0
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_8388352_mask_ashr_8:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrld $8, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i32_x_4_8388352_mask_ashr_8:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX1-NEXT: vpsrld $8, %xmm0, %xmm0
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i32_x_4_8388352_mask_ashr_8:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
+; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vpsrld $8, %xmm0, %xmm0
+; X64-AVX2-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 8388352, i32 8388352, i32 8388352, i32 8388352>
%t1 = ashr <4 x i32> %t0, <i32 8, i32 8, i32 8, i32 8>
ret <4 x i32> %t1
}
define <4 x i32> @test_128_i32_x_4_8388352_mask_ashr_9(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_8388352_mask_ashr_9:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrld $9, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i32_x_4_8388352_mask_ashr_9:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpsrld $9, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_8388352_mask_ashr_9:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
-; X32-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpsrld $9, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_8388352_mask_ashr_9:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrld $9, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i32_x_4_8388352_mask_ashr_9:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpsrld $9, %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_8388352_mask_ashr_9:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
-; X64-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpsrld $9, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_8388352_mask_ashr_9:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrld $9, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i32_x_4_8388352_mask_ashr_9:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpsrld $9, %xmm0, %xmm0
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i32_x_4_8388352_mask_ashr_9:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
+; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpsrld $9, %xmm0, %xmm0
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_8388352_mask_ashr_9:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrld $9, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i32_x_4_8388352_mask_ashr_9:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX1-NEXT: vpsrld $9, %xmm0, %xmm0
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i32_x_4_8388352_mask_ashr_9:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
+; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vpsrld $9, %xmm0, %xmm0
+; X64-AVX2-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 8388352, i32 8388352, i32 8388352, i32 8388352>
%t1 = ashr <4 x i32> %t0, <i32 9, i32 9, i32 9, i32 9>
ret <4 x i32> %t1
}
define <4 x i32> @test_128_i32_x_4_8388352_mask_ashr_10(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_8388352_mask_ashr_10:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrld $10, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i32_x_4_8388352_mask_ashr_10:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpsrld $10, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_8388352_mask_ashr_10:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
-; X32-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpsrld $10, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_8388352_mask_ashr_10:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrld $10, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i32_x_4_8388352_mask_ashr_10:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpsrld $10, %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_8388352_mask_ashr_10:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
-; X64-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpsrld $10, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_8388352_mask_ashr_10:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrld $10, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i32_x_4_8388352_mask_ashr_10:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpsrld $10, %xmm0, %xmm0
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i32_x_4_8388352_mask_ashr_10:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
+; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpsrld $10, %xmm0, %xmm0
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_8388352_mask_ashr_10:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrld $10, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i32_x_4_8388352_mask_ashr_10:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX1-NEXT: vpsrld $10, %xmm0, %xmm0
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i32_x_4_8388352_mask_ashr_10:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
+; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vpsrld $10, %xmm0, %xmm0
+; X64-AVX2-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 8388352, i32 8388352, i32 8388352, i32 8388352>
%t1 = ashr <4 x i32> %t0, <i32 10, i32 10, i32 10, i32 10>
ret <4 x i32> %t1
}
define <4 x i32> @test_128_i32_x_4_4294836224_mask_ashr_1(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_4294836224_mask_ashr_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrad $1, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i32_x_4_4294836224_mask_ashr_1:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpsrad $1, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_1:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294836224,4294836224,4294836224,4294836224]
-; X32-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpsrad $1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_4294836224_mask_ashr_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrad $1, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i32_x_4_4294836224_mask_ashr_1:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpsrad $1, %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_1:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294836224,4294836224,4294836224,4294836224]
-; X64-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpsrad $1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrad $1, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i32_x_4_4294836224_mask_ashr_1:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpsrad $1, %xmm0, %xmm0
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_1:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294836224,4294836224,4294836224,4294836224]
+; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpsrad $1, %xmm0, %xmm0
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrad $1, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i32_x_4_4294836224_mask_ashr_1:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX1-NEXT: vpsrad $1, %xmm0, %xmm0
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_1:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294836224,4294836224,4294836224,4294836224]
+; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vpsrad $1, %xmm0, %xmm0
+; X64-AVX2-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 4294836224, i32 4294836224, i32 4294836224, i32 4294836224>
%t1 = ashr <4 x i32> %t0, <i32 1, i32 1, i32 1, i32 1>
ret <4 x i32> %t1
}
define <4 x i32> @test_128_i32_x_4_4294836224_mask_ashr_16(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_4294836224_mask_ashr_16:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrad $16, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i32_x_4_4294836224_mask_ashr_16:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpsrad $16, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_16:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294836224,4294836224,4294836224,4294836224]
-; X32-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpsrad $16, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_4294836224_mask_ashr_16:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrad $16, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i32_x_4_4294836224_mask_ashr_16:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpsrad $16, %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_16:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294836224,4294836224,4294836224,4294836224]
-; X64-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpsrad $16, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_16:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrad $16, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i32_x_4_4294836224_mask_ashr_16:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpsrad $16, %xmm0, %xmm0
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_16:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294836224,4294836224,4294836224,4294836224]
+; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpsrad $16, %xmm0, %xmm0
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_16:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrad $16, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i32_x_4_4294836224_mask_ashr_16:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX1-NEXT: vpsrad $16, %xmm0, %xmm0
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_16:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294836224,4294836224,4294836224,4294836224]
+; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vpsrad $16, %xmm0, %xmm0
+; X64-AVX2-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 4294836224, i32 4294836224, i32 4294836224, i32 4294836224>
%t1 = ashr <4 x i32> %t0, <i32 16, i32 16, i32 16, i32 16>
ret <4 x i32> %t1
}
define <4 x i32> @test_128_i32_x_4_4294836224_mask_ashr_17(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_4294836224_mask_ashr_17:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: psrad $17, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i32_x_4_4294836224_mask_ashr_17:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpsrad $17, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_4294836224_mask_ashr_17:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: psrad $17, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i32_x_4_4294836224_mask_ashr_17:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpsrad $17, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_17:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: psrad $17, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i32_x_4_4294836224_mask_ashr_17:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpsrad $17, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_17:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: psrad $17, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i32_x_4_4294836224_mask_ashr_17:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpsrad $17, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 4294836224, i32 4294836224, i32 4294836224, i32 4294836224>
%t1 = ashr <4 x i32> %t0, <i32 17, i32 17, i32 17, i32 17>
ret <4 x i32> %t1
}
define <4 x i32> @test_128_i32_x_4_4294836224_mask_ashr_18(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_4294836224_mask_ashr_18:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: psrad $18, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i32_x_4_4294836224_mask_ashr_18:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpsrad $18, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_4294836224_mask_ashr_18:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: psrad $18, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i32_x_4_4294836224_mask_ashr_18:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpsrad $18, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_18:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: psrad $18, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i32_x_4_4294836224_mask_ashr_18:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpsrad $18, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_ashr_18:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: psrad $18, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i32_x_4_4294836224_mask_ashr_18:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpsrad $18, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 4294836224, i32 4294836224, i32 4294836224, i32 4294836224>
%t1 = ashr <4 x i32> %t0, <i32 18, i32 18, i32 18, i32 18>
ret <4 x i32> %t1
@@ -2311,345 +2311,345 @@ define <4 x i32> @test_128_i32_x_4_4294836224_mask_ashr_18(<4 x i32> %a0) {
; shl
define <4 x i32> @test_128_i32_x_4_32767_mask_shl_1(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_32767_mask_shl_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: paddd %xmm0, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i32_x_4_32767_mask_shl_1:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpaddd %xmm0, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_32767_mask_shl_1:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [32767,32767,32767,32767]
-; X32-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpaddd %xmm0, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_32767_mask_shl_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: paddd %xmm0, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i32_x_4_32767_mask_shl_1:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpaddd %xmm0, %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_32767_mask_shl_1:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [32767,32767,32767,32767]
-; X64-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpaddd %xmm0, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_32767_mask_shl_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: paddd %xmm0, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i32_x_4_32767_mask_shl_1:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpaddd %xmm0, %xmm0, %xmm0
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i32_x_4_32767_mask_shl_1:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [32767,32767,32767,32767]
+; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpaddd %xmm0, %xmm0, %xmm0
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_32767_mask_shl_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: paddd %xmm0, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i32_x_4_32767_mask_shl_1:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX1-NEXT: vpaddd %xmm0, %xmm0, %xmm0
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i32_x_4_32767_mask_shl_1:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [32767,32767,32767,32767]
+; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vpaddd %xmm0, %xmm0, %xmm0
+; X64-AVX2-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 32767, i32 32767, i32 32767, i32 32767>
%t1 = shl <4 x i32> %t0, <i32 1, i32 1, i32 1, i32 1>
ret <4 x i32> %t1
}
define <4 x i32> @test_128_i32_x_4_32767_mask_shl_16(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_32767_mask_shl_16:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: pslld $16, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i32_x_4_32767_mask_shl_16:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpslld $16, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_32767_mask_shl_16:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [32767,32767,32767,32767]
-; X32-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpslld $16, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_32767_mask_shl_16:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: pslld $16, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i32_x_4_32767_mask_shl_16:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpslld $16, %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_32767_mask_shl_16:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [32767,32767,32767,32767]
-; X64-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpslld $16, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_32767_mask_shl_16:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: pslld $16, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i32_x_4_32767_mask_shl_16:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpslld $16, %xmm0, %xmm0
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i32_x_4_32767_mask_shl_16:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [32767,32767,32767,32767]
+; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpslld $16, %xmm0, %xmm0
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_32767_mask_shl_16:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: pslld $16, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i32_x_4_32767_mask_shl_16:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX1-NEXT: vpslld $16, %xmm0, %xmm0
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i32_x_4_32767_mask_shl_16:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [32767,32767,32767,32767]
+; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vpslld $16, %xmm0, %xmm0
+; X64-AVX2-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 32767, i32 32767, i32 32767, i32 32767>
%t1 = shl <4 x i32> %t0, <i32 16, i32 16, i32 16, i32 16>
ret <4 x i32> %t1
}
define <4 x i32> @test_128_i32_x_4_32767_mask_shl_17(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_32767_mask_shl_17:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pslld $17, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i32_x_4_32767_mask_shl_17:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpslld $17, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_32767_mask_shl_17:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pslld $17, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i32_x_4_32767_mask_shl_17:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpslld $17, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_32767_mask_shl_17:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pslld $17, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i32_x_4_32767_mask_shl_17:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpslld $17, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_32767_mask_shl_17:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pslld $17, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i32_x_4_32767_mask_shl_17:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpslld $17, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 32767, i32 32767, i32 32767, i32 32767>
%t1 = shl <4 x i32> %t0, <i32 17, i32 17, i32 17, i32 17>
ret <4 x i32> %t1
}
define <4 x i32> @test_128_i32_x_4_32767_mask_shl_18(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_32767_mask_shl_18:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pslld $18, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i32_x_4_32767_mask_shl_18:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpslld $18, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_32767_mask_shl_18:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pslld $18, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i32_x_4_32767_mask_shl_18:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpslld $18, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_32767_mask_shl_18:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pslld $18, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i32_x_4_32767_mask_shl_18:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpslld $18, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_32767_mask_shl_18:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pslld $18, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i32_x_4_32767_mask_shl_18:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpslld $18, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 32767, i32 32767, i32 32767, i32 32767>
%t1 = shl <4 x i32> %t0, <i32 18, i32 18, i32 18, i32 18>
ret <4 x i32> %t1
}
define <4 x i32> @test_128_i32_x_4_8388352_mask_shl_7(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_8388352_mask_shl_7:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: pslld $7, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i32_x_4_8388352_mask_shl_7:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpslld $7, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_8388352_mask_shl_7:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
-; X32-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpslld $7, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_8388352_mask_shl_7:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: pslld $7, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i32_x_4_8388352_mask_shl_7:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpslld $7, %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_8388352_mask_shl_7:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
-; X64-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpslld $7, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_8388352_mask_shl_7:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: pslld $7, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i32_x_4_8388352_mask_shl_7:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpslld $7, %xmm0, %xmm0
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i32_x_4_8388352_mask_shl_7:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
+; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpslld $7, %xmm0, %xmm0
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_8388352_mask_shl_7:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: pslld $7, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i32_x_4_8388352_mask_shl_7:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX1-NEXT: vpslld $7, %xmm0, %xmm0
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i32_x_4_8388352_mask_shl_7:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
+; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vpslld $7, %xmm0, %xmm0
+; X64-AVX2-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 8388352, i32 8388352, i32 8388352, i32 8388352>
%t1 = shl <4 x i32> %t0, <i32 7, i32 7, i32 7, i32 7>
ret <4 x i32> %t1
}
define <4 x i32> @test_128_i32_x_4_8388352_mask_shl_8(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_8388352_mask_shl_8:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: pslld $8, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i32_x_4_8388352_mask_shl_8:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpslld $8, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_8388352_mask_shl_8:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
-; X32-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpslld $8, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_8388352_mask_shl_8:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: pslld $8, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i32_x_4_8388352_mask_shl_8:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpslld $8, %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_8388352_mask_shl_8:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
-; X64-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpslld $8, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_8388352_mask_shl_8:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: pslld $8, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i32_x_4_8388352_mask_shl_8:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpslld $8, %xmm0, %xmm0
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i32_x_4_8388352_mask_shl_8:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
+; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpslld $8, %xmm0, %xmm0
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_8388352_mask_shl_8:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: pslld $8, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i32_x_4_8388352_mask_shl_8:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX1-NEXT: vpslld $8, %xmm0, %xmm0
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i32_x_4_8388352_mask_shl_8:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
+; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vpslld $8, %xmm0, %xmm0
+; X64-AVX2-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 8388352, i32 8388352, i32 8388352, i32 8388352>
%t1 = shl <4 x i32> %t0, <i32 8, i32 8, i32 8, i32 8>
ret <4 x i32> %t1
}
define <4 x i32> @test_128_i32_x_4_8388352_mask_shl_9(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_8388352_mask_shl_9:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: pslld $9, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i32_x_4_8388352_mask_shl_9:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpslld $9, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_8388352_mask_shl_9:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
-; X32-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpslld $9, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_8388352_mask_shl_9:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: pslld $9, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i32_x_4_8388352_mask_shl_9:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpslld $9, %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_8388352_mask_shl_9:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
-; X64-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpslld $9, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_8388352_mask_shl_9:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: pslld $9, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i32_x_4_8388352_mask_shl_9:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpslld $9, %xmm0, %xmm0
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i32_x_4_8388352_mask_shl_9:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
+; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpslld $9, %xmm0, %xmm0
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_8388352_mask_shl_9:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: pslld $9, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i32_x_4_8388352_mask_shl_9:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX1-NEXT: vpslld $9, %xmm0, %xmm0
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i32_x_4_8388352_mask_shl_9:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
+; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vpslld $9, %xmm0, %xmm0
+; X64-AVX2-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 8388352, i32 8388352, i32 8388352, i32 8388352>
%t1 = shl <4 x i32> %t0, <i32 9, i32 9, i32 9, i32 9>
ret <4 x i32> %t1
}
define <4 x i32> @test_128_i32_x_4_8388352_mask_shl_10(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_8388352_mask_shl_10:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: pslld $10, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i32_x_4_8388352_mask_shl_10:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpslld $10, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_8388352_mask_shl_10:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
-; X32-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpslld $10, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_8388352_mask_shl_10:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: pslld $10, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i32_x_4_8388352_mask_shl_10:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpslld $10, %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_8388352_mask_shl_10:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
-; X64-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpslld $10, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_8388352_mask_shl_10:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: pslld $10, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i32_x_4_8388352_mask_shl_10:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpslld $10, %xmm0, %xmm0
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i32_x_4_8388352_mask_shl_10:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
+; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpslld $10, %xmm0, %xmm0
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_8388352_mask_shl_10:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: pslld $10, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i32_x_4_8388352_mask_shl_10:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX1-NEXT: vpslld $10, %xmm0, %xmm0
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i32_x_4_8388352_mask_shl_10:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388352,8388352,8388352,8388352]
+; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vpslld $10, %xmm0, %xmm0
+; X64-AVX2-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 8388352, i32 8388352, i32 8388352, i32 8388352>
%t1 = shl <4 x i32> %t0, <i32 10, i32 10, i32 10, i32 10>
ret <4 x i32> %t1
}
define <4 x i32> @test_128_i32_x_4_4294836224_mask_shl_1(<4 x i32> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i32_x_4_4294836224_mask_shl_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: paddd %xmm0, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i32_x_4_4294836224_mask_shl_1:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpaddd %xmm0, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_4294836224_mask_shl_1:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294836224,4294836224,4294836224,4294836224]
-; X32-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpaddd %xmm0, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i32_x_4_4294836224_mask_shl_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: paddd %xmm0, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i32_x_4_4294836224_mask_shl_1:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpaddd %xmm0, %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i32_x_4_4294836224_mask_shl_1:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294836224,4294836224,4294836224,4294836224]
-; X64-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpaddd %xmm0, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_shl_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: paddd %xmm0, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i32_x_4_4294836224_mask_shl_1:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpaddd %xmm0, %xmm0, %xmm0
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i32_x_4_4294836224_mask_shl_1:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294836224,4294836224,4294836224,4294836224]
+; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpaddd %xmm0, %xmm0, %xmm0
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i32_x_4_4294836224_mask_shl_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: paddd %xmm0, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i32_x_4_4294836224_mask_shl_1:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX1-NEXT: vpaddd %xmm0, %xmm0, %xmm0
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i32_x_4_4294836224_mask_shl_1:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294836224,4294836224,4294836224,4294836224]
+; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vpaddd %xmm0, %xmm0, %xmm0
+; X64-AVX2-NEXT: retq
%t0 = and <4 x i32> %a0, <i32 4294836224, i32 4294836224, i32 4294836224, i32 4294836224>
%t1 = shl <4 x i32> %t0, <i32 1, i32 1, i32 1, i32 1>
ret <4 x i32> %t1
@@ -2662,254 +2662,254 @@ define <4 x i32> @test_128_i32_x_4_4294836224_mask_shl_1(<4 x i32> %a0) {
; lshr
define <2 x i64> @test_128_i64_x_2_2147483647_mask_lshr_1(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_2147483647_mask_lshr_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlq $1, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i64_x_2_2147483647_mask_lshr_1:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlq $1, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_2147483647_mask_lshr_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlq $1, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i64_x_2_2147483647_mask_lshr_1:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlq $1, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_2147483647_mask_lshr_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlq $1, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i64_x_2_2147483647_mask_lshr_1:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlq $1, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_2147483647_mask_lshr_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlq $1, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i64_x_2_2147483647_mask_lshr_1:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlq $1, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 2147483647, i64 2147483647>
%t1 = lshr <2 x i64> %t0, <i64 1, i64 1>
ret <2 x i64> %t1
}
define <2 x i64> @test_128_i64_x_2_140737488289792_mask_lshr_15(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_15:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlq $15, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_15:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlq $15, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_15:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlq $15, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_15:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlq $15, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_15:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlq $15, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_15:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlq $15, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_15:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlq $15, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_15:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlq $15, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 140737488289792, i64 140737488289792>
%t1 = lshr <2 x i64> %t0, <i64 15, i64 15>
ret <2 x i64> %t1
}
define <2 x i64> @test_128_i64_x_2_140737488289792_mask_lshr_16(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_16:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlq $16, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_16:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlq $16, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_16:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlq $16, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_16:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlq $16, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_16:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlq $16, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_16:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlq $16, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_16:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlq $16, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_16:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlq $16, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 140737488289792, i64 140737488289792>
%t1 = lshr <2 x i64> %t0, <i64 16, i64 16>
ret <2 x i64> %t1
}
define <2 x i64> @test_128_i64_x_2_140737488289792_mask_lshr_17(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_17:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlq $17, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_17:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlq $17, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_17:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlq $17, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_17:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlq $17, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_17:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlq $17, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_17:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlq $17, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_17:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlq $17, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_17:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlq $17, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 140737488289792, i64 140737488289792>
%t1 = lshr <2 x i64> %t0, <i64 17, i64 17>
ret <2 x i64> %t1
}
define <2 x i64> @test_128_i64_x_2_140737488289792_mask_lshr_18(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_18:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlq $18, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_18:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlq $18, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_18:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlq $18, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_18:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlq $18, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_18:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlq $18, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_18:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlq $18, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_18:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlq $18, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_lshr_18:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlq $18, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 140737488289792, i64 140737488289792>
%t1 = lshr <2 x i64> %t0, <i64 18, i64 18>
ret <2 x i64> %t1
}
define <2 x i64> @test_128_i64_x_2_18446744065119617024_mask_lshr_1(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlq $1, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_1:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlq $1, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlq $1, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_1:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlq $1, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlq $1, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_1:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlq $1, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlq $1, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_1:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlq $1, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 18446744065119617024, i64 18446744065119617024>
%t1 = lshr <2 x i64> %t0, <i64 1, i64 1>
ret <2 x i64> %t1
}
define <2 x i64> @test_128_i64_x_2_18446744065119617024_mask_lshr_32(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_32:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlq $32, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_32:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpsrlq $32, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_32:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294967294,4294967294,4294967294,4294967294]
-; X32-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpsrlq $32, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_32:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlq $32, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_32:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlq $32, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_32:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlq $32, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_32:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpsrlq $32, %xmm0, %xmm0
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_32:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294967294,4294967294,4294967294,4294967294]
+; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpsrlq $32, %xmm0, %xmm0
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_32:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlq $32, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_32:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlq $32, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 18446744065119617024, i64 18446744065119617024>
%t1 = lshr <2 x i64> %t0, <i64 32, i64 32>
ret <2 x i64> %t1
}
define <2 x i64> @test_128_i64_x_2_18446744065119617024_mask_lshr_33(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_33:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: psrlq $33, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_33:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpsrlq $33, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_33:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: psrlq $33, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_33:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpsrlq $33, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_33:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: psrlq $33, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_33:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpsrlq $33, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_33:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: psrlq $33, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_33:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpsrlq $33, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 18446744065119617024, i64 18446744065119617024>
%t1 = lshr <2 x i64> %t0, <i64 33, i64 33>
ret <2 x i64> %t1
}
define <2 x i64> @test_128_i64_x_2_18446744065119617024_mask_lshr_34(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_34:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: psrlq $34, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_34:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpsrlq $34, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_34:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: psrlq $34, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_34:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpsrlq $34, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_34:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: psrlq $34, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_34:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpsrlq $34, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_34:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: psrlq $34, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_lshr_34:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpsrlq $34, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 18446744065119617024, i64 18446744065119617024>
%t1 = lshr <2 x i64> %t0, <i64 34, i64 34>
ret <2 x i64> %t1
@@ -2918,362 +2918,362 @@ define <2 x i64> @test_128_i64_x_2_18446744065119617024_mask_lshr_34(<2 x i64> %
; ashr
define <2 x i64> @test_128_i64_x_2_2147483647_mask_ashr_1(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_2147483647_mask_ashr_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlq $1, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i64_x_2_2147483647_mask_ashr_1:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlq $1, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_2147483647_mask_ashr_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlq $1, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i64_x_2_2147483647_mask_ashr_1:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlq $1, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_2147483647_mask_ashr_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlq $1, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i64_x_2_2147483647_mask_ashr_1:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlq $1, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_2147483647_mask_ashr_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlq $1, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i64_x_2_2147483647_mask_ashr_1:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlq $1, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 2147483647, i64 2147483647>
%t1 = ashr <2 x i64> %t0, <i64 1, i64 1>
ret <2 x i64> %t1
}
define <2 x i64> @test_128_i64_x_2_140737488289792_mask_ashr_15(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_15:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlq $15, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_15:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlq $15, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_15:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlq $15, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_15:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlq $15, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_15:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlq $15, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_15:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlq $15, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_15:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlq $15, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_15:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlq $15, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 140737488289792, i64 140737488289792>
%t1 = ashr <2 x i64> %t0, <i64 15, i64 15>
ret <2 x i64> %t1
}
define <2 x i64> @test_128_i64_x_2_140737488289792_mask_ashr_16(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_16:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlq $16, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_16:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlq $16, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_16:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlq $16, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_16:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlq $16, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_16:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlq $16, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_16:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlq $16, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_16:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlq $16, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_16:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlq $16, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 140737488289792, i64 140737488289792>
%t1 = ashr <2 x i64> %t0, <i64 16, i64 16>
ret <2 x i64> %t1
}
define <2 x i64> @test_128_i64_x_2_140737488289792_mask_ashr_17(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_17:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlq $17, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_17:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlq $17, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_17:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlq $17, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_17:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlq $17, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_17:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlq $17, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_17:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlq $17, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_17:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlq $17, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_17:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlq $17, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 140737488289792, i64 140737488289792>
%t1 = ashr <2 x i64> %t0, <i64 17, i64 17>
ret <2 x i64> %t1
}
define <2 x i64> @test_128_i64_x_2_140737488289792_mask_ashr_18(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_18:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrlq $18, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_18:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsrlq $18, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_18:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrlq $18, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_18:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsrlq $18, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_18:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrlq $18, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_18:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsrlq $18, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_18:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrlq $18, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_ashr_18:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsrlq $18, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 140737488289792, i64 140737488289792>
%t1 = ashr <2 x i64> %t0, <i64 18, i64 18>
ret <2 x i64> %t1
}
define <2 x i64> @test_128_i64_x_2_18446744065119617024_mask_ashr_1(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psrad $1, %xmm0
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_1:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpsrad $1, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; X32-SSE2AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5],xmm0[6,7]
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_1:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294967294,4294967294,4294967294,4294967294]
-; X32-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpsrad $1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; X32-SSE2AVX1AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2],xmm0[3]
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psrad $1, %xmm0
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_1:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpsrad $1, %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; X64-SSE2AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5],xmm0[6,7]
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_1:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpsrad $1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; X64-SSE2AVX1AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2],xmm0[3]
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psrad $1, %xmm0
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_1:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpsrad $1, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
+; X86-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5],xmm0[6,7]
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_1:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294967294,4294967294,4294967294,4294967294]
+; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpsrad $1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
+; X86-AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2],xmm0[3]
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psrad $1, %xmm0
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_1:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX1-NEXT: vpsrad $1, %xmm0, %xmm0
+; X64-AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
+; X64-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5],xmm0[6,7]
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_1:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX2-NEXT: vpsrad $1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
+; X64-AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2],xmm0[3]
+; X64-AVX2-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 18446744065119617024, i64 18446744065119617024>
%t1 = ashr <2 x i64> %t0, <i64 1, i64 1>
ret <2 x i64> %t1
}
define <2 x i64> @test_128_i64_x_2_18446744065119617024_mask_ashr_32(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_32:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,3,2,3]
-; X32-SSE2ONLY-NEXT: psrad $31, %xmm0
-; X32-SSE2ONLY-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
-; X32-SSE2ONLY-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
-; X32-SSE2ONLY-NEXT: movdqa %xmm1, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_32:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpsrad $31, %xmm0, %xmm1
-; X32-SSE2AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; X32-SSE2AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_32:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpsrad $31, %xmm0, %xmm1
-; X32-SSE2AVX1AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; X32-SSE2AVX1AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_32:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,3,2,3]
-; X64-SSE2ONLY-NEXT: psrad $31, %xmm0
-; X64-SSE2ONLY-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
-; X64-SSE2ONLY-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
-; X64-SSE2ONLY-NEXT: movdqa %xmm1, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_32:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpsrad $31, %xmm0, %xmm1
-; X64-SSE2AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; X64-SSE2AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_32:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpsrad $31, %xmm0, %xmm1
-; X64-SSE2AVX1AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; X64-SSE2AVX1AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_32:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,3,2,3]
+; X86-SSE2-NEXT: psrad $31, %xmm0
+; X86-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
+; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
+; X86-SSE2-NEXT: movdqa %xmm1, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_32:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpsrad $31, %xmm0, %xmm1
+; X86-AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; X86-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_32:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpsrad $31, %xmm0, %xmm1
+; X86-AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; X86-AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_32:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,3,2,3]
+; X64-SSE2-NEXT: psrad $31, %xmm0
+; X64-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
+; X64-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
+; X64-SSE2-NEXT: movdqa %xmm1, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_32:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX1-NEXT: vpsrad $31, %xmm0, %xmm1
+; X64-AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; X64-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_32:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX2-NEXT: vpsrad $31, %xmm0, %xmm1
+; X64-AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; X64-AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
+; X64-AVX2-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 18446744065119617024, i64 18446744065119617024>
%t1 = ashr <2 x i64> %t0, <i64 32, i64 32>
ret <2 x i64> %t1
}
define <2 x i64> @test_128_i64_x_2_18446744065119617024_mask_ashr_33(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_33:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: movdqa %xmm0, %xmm1
-; X32-SSE2ONLY-NEXT: psrad $31, %xmm1
-; X32-SSE2ONLY-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
-; X32-SSE2ONLY-NEXT: psrad $1, %xmm0
-; X32-SSE2ONLY-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
-; X32-SSE2ONLY-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_33:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpsrad $31, %xmm0, %xmm1
-; X32-SSE2AVX1-NEXT: vpsrad $1, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; X32-SSE2AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_33:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpsrad $31, %xmm0, %xmm1
-; X32-SSE2AVX1AVX2-NEXT: vpsrad $1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; X32-SSE2AVX1AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_33:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: movdqa %xmm0, %xmm1
-; X64-SSE2ONLY-NEXT: psrad $31, %xmm1
-; X64-SSE2ONLY-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
-; X64-SSE2ONLY-NEXT: psrad $1, %xmm0
-; X64-SSE2ONLY-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
-; X64-SSE2ONLY-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_33:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpsrad $31, %xmm0, %xmm1
-; X64-SSE2AVX1-NEXT: vpsrad $1, %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; X64-SSE2AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_33:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpsrad $31, %xmm0, %xmm1
-; X64-SSE2AVX1AVX2-NEXT: vpsrad $1, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; X64-SSE2AVX1AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_33:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: movdqa %xmm0, %xmm1
+; X86-SSE2-NEXT: psrad $31, %xmm1
+; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
+; X86-SSE2-NEXT: psrad $1, %xmm0
+; X86-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
+; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_33:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpsrad $31, %xmm0, %xmm1
+; X86-AVX1-NEXT: vpsrad $1, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; X86-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_33:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpsrad $31, %xmm0, %xmm1
+; X86-AVX2-NEXT: vpsrad $1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; X86-AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_33:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: movdqa %xmm0, %xmm1
+; X64-SSE2-NEXT: psrad $31, %xmm1
+; X64-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
+; X64-SSE2-NEXT: psrad $1, %xmm0
+; X64-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
+; X64-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_33:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpsrad $31, %xmm0, %xmm1
+; X64-AVX1-NEXT: vpsrad $1, %xmm0, %xmm0
+; X64-AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; X64-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_33:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpsrad $31, %xmm0, %xmm1
+; X64-AVX2-NEXT: vpsrad $1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; X64-AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
+; X64-AVX2-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 18446744065119617024, i64 18446744065119617024>
%t1 = ashr <2 x i64> %t0, <i64 33, i64 33>
ret <2 x i64> %t1
}
define <2 x i64> @test_128_i64_x_2_18446744065119617024_mask_ashr_34(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_34:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: movdqa %xmm0, %xmm1
-; X32-SSE2ONLY-NEXT: psrad $31, %xmm1
-; X32-SSE2ONLY-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
-; X32-SSE2ONLY-NEXT: psrad $2, %xmm0
-; X32-SSE2ONLY-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
-; X32-SSE2ONLY-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_34:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpsrad $31, %xmm0, %xmm1
-; X32-SSE2AVX1-NEXT: vpsrad $2, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; X32-SSE2AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_34:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpsrad $31, %xmm0, %xmm1
-; X32-SSE2AVX1AVX2-NEXT: vpsrad $2, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; X32-SSE2AVX1AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_34:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: movdqa %xmm0, %xmm1
-; X64-SSE2ONLY-NEXT: psrad $31, %xmm1
-; X64-SSE2ONLY-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
-; X64-SSE2ONLY-NEXT: psrad $2, %xmm0
-; X64-SSE2ONLY-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
-; X64-SSE2ONLY-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_34:
-; X64-SSE2AVX1: # %bb.0:
-; X64-SSE2AVX1-NEXT: vpsrad $31, %xmm0, %xmm1
-; X64-SSE2AVX1-NEXT: vpsrad $2, %xmm0, %xmm0
-; X64-SSE2AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; X64-SSE2AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
-; X64-SSE2AVX1-NEXT: retq
-;
-; X64-SSE2AVX1AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_34:
-; X64-SSE2AVX1AVX2: # %bb.0:
-; X64-SSE2AVX1AVX2-NEXT: vpsrad $31, %xmm0, %xmm1
-; X64-SSE2AVX1AVX2-NEXT: vpsrad $2, %xmm0, %xmm0
-; X64-SSE2AVX1AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; X64-SSE2AVX1AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
-; X64-SSE2AVX1AVX2-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_34:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: movdqa %xmm0, %xmm1
+; X86-SSE2-NEXT: psrad $31, %xmm1
+; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
+; X86-SSE2-NEXT: psrad $2, %xmm0
+; X86-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
+; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_34:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpsrad $31, %xmm0, %xmm1
+; X86-AVX1-NEXT: vpsrad $2, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; X86-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_34:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpsrad $31, %xmm0, %xmm1
+; X86-AVX2-NEXT: vpsrad $2, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; X86-AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_34:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: movdqa %xmm0, %xmm1
+; X64-SSE2-NEXT: psrad $31, %xmm1
+; X64-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
+; X64-SSE2-NEXT: psrad $2, %xmm0
+; X64-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
+; X64-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX1-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_34:
+; X64-AVX1: # %bb.0:
+; X64-AVX1-NEXT: vpsrad $31, %xmm0, %xmm1
+; X64-AVX1-NEXT: vpsrad $2, %xmm0, %xmm0
+; X64-AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; X64-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
+; X64-AVX1-NEXT: retq
+;
+; X64-AVX2-LABEL: test_128_i64_x_2_18446744065119617024_mask_ashr_34:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vpsrad $31, %xmm0, %xmm1
+; X64-AVX2-NEXT: vpsrad $2, %xmm0, %xmm0
+; X64-AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; X64-AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
+; X64-AVX2-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 18446744065119617024, i64 18446744065119617024>
%t1 = ashr <2 x i64> %t0, <i64 34, i64 34>
ret <2 x i64> %t1
@@ -3282,254 +3282,254 @@ define <2 x i64> @test_128_i64_x_2_18446744065119617024_mask_ashr_34(<2 x i64> %
; shl
define <2 x i64> @test_128_i64_x_2_2147483647_mask_shl_1(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_2147483647_mask_shl_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: paddq %xmm0, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i64_x_2_2147483647_mask_shl_1:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpaddq %xmm0, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_2147483647_mask_shl_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: paddq %xmm0, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i64_x_2_2147483647_mask_shl_1:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpaddq %xmm0, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_2147483647_mask_shl_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: paddq %xmm0, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i64_x_2_2147483647_mask_shl_1:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpaddq %xmm0, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_2147483647_mask_shl_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: paddq %xmm0, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i64_x_2_2147483647_mask_shl_1:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpaddq %xmm0, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 2147483647, i64 2147483647>
%t1 = shl <2 x i64> %t0, <i64 1, i64 1>
ret <2 x i64> %t1
}
define <2 x i64> @test_128_i64_x_2_2147483647_mask_shl_32(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_2147483647_mask_shl_32:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psllq $32, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX1-LABEL: test_128_i64_x_2_2147483647_mask_shl_32:
-; X32-SSE2AVX1: # %bb.0:
-; X32-SSE2AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: vpsllq $32, %xmm0, %xmm0
-; X32-SSE2AVX1-NEXT: retl
-;
-; X32-SSE2AVX1AVX2-LABEL: test_128_i64_x_2_2147483647_mask_shl_32:
-; X32-SSE2AVX1AVX2: # %bb.0:
-; X32-SSE2AVX1AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [2147483647,2147483647,2147483647,2147483647]
-; X32-SSE2AVX1AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: vpsllq $32, %xmm0, %xmm0
-; X32-SSE2AVX1AVX2-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_2147483647_mask_shl_32:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psllq $32, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i64_x_2_2147483647_mask_shl_32:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsllq $32, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_2147483647_mask_shl_32:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psllq $32, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX1-LABEL: test_128_i64_x_2_2147483647_mask_shl_32:
+; X86-AVX1: # %bb.0:
+; X86-AVX1-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX1-NEXT: vpsllq $32, %xmm0, %xmm0
+; X86-AVX1-NEXT: retl
+;
+; X86-AVX2-LABEL: test_128_i64_x_2_2147483647_mask_shl_32:
+; X86-AVX2: # %bb.0:
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [2147483647,2147483647,2147483647,2147483647]
+; X86-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
+; X86-AVX2-NEXT: vpsllq $32, %xmm0, %xmm0
+; X86-AVX2-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_2147483647_mask_shl_32:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psllq $32, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i64_x_2_2147483647_mask_shl_32:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsllq $32, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 2147483647, i64 2147483647>
%t1 = shl <2 x i64> %t0, <i64 32, i64 32>
ret <2 x i64> %t1
}
define <2 x i64> @test_128_i64_x_2_2147483647_mask_shl_33(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_2147483647_mask_shl_33:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: psllq $33, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i64_x_2_2147483647_mask_shl_33:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpsllq $33, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_2147483647_mask_shl_33:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: psllq $33, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i64_x_2_2147483647_mask_shl_33:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpsllq $33, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_2147483647_mask_shl_33:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: psllq $33, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i64_x_2_2147483647_mask_shl_33:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpsllq $33, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_2147483647_mask_shl_33:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: psllq $33, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i64_x_2_2147483647_mask_shl_33:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpsllq $33, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 2147483647, i64 2147483647>
%t1 = shl <2 x i64> %t0, <i64 33, i64 33>
ret <2 x i64> %t1
}
define <2 x i64> @test_128_i64_x_2_2147483647_mask_shl_34(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_2147483647_mask_shl_34:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: psllq $34, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i64_x_2_2147483647_mask_shl_34:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpsllq $34, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_2147483647_mask_shl_34:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: psllq $34, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i64_x_2_2147483647_mask_shl_34:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpsllq $34, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_2147483647_mask_shl_34:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: psllq $34, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i64_x_2_2147483647_mask_shl_34:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpsllq $34, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_2147483647_mask_shl_34:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: psllq $34, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i64_x_2_2147483647_mask_shl_34:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpsllq $34, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 2147483647, i64 2147483647>
%t1 = shl <2 x i64> %t0, <i64 34, i64 34>
ret <2 x i64> %t1
}
define <2 x i64> @test_128_i64_x_2_140737488289792_mask_shl_15(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_140737488289792_mask_shl_15:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psllq $15, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i64_x_2_140737488289792_mask_shl_15:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsllq $15, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_140737488289792_mask_shl_15:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psllq $15, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i64_x_2_140737488289792_mask_shl_15:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsllq $15, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_shl_15:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psllq $15, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_shl_15:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsllq $15, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_shl_15:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psllq $15, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_shl_15:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsllq $15, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 140737488289792, i64 140737488289792>
%t1 = shl <2 x i64> %t0, <i64 15, i64 15>
ret <2 x i64> %t1
}
define <2 x i64> @test_128_i64_x_2_140737488289792_mask_shl_16(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_140737488289792_mask_shl_16:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psllq $16, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i64_x_2_140737488289792_mask_shl_16:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsllq $16, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_140737488289792_mask_shl_16:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psllq $16, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i64_x_2_140737488289792_mask_shl_16:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsllq $16, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_shl_16:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psllq $16, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_shl_16:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsllq $16, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_shl_16:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psllq $16, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_shl_16:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsllq $16, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 140737488289792, i64 140737488289792>
%t1 = shl <2 x i64> %t0, <i64 16, i64 16>
ret <2 x i64> %t1
}
define <2 x i64> @test_128_i64_x_2_140737488289792_mask_shl_17(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_140737488289792_mask_shl_17:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psllq $17, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i64_x_2_140737488289792_mask_shl_17:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsllq $17, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_140737488289792_mask_shl_17:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psllq $17, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i64_x_2_140737488289792_mask_shl_17:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsllq $17, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_shl_17:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psllq $17, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_shl_17:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsllq $17, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_shl_17:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psllq $17, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_shl_17:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsllq $17, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 140737488289792, i64 140737488289792>
%t1 = shl <2 x i64> %t0, <i64 17, i64 17>
ret <2 x i64> %t1
}
define <2 x i64> @test_128_i64_x_2_140737488289792_mask_shl_18(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_140737488289792_mask_shl_18:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: psllq $18, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i64_x_2_140737488289792_mask_shl_18:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpsllq $18, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_140737488289792_mask_shl_18:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: psllq $18, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i64_x_2_140737488289792_mask_shl_18:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpsllq $18, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_shl_18:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: psllq $18, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_shl_18:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpsllq $18, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_140737488289792_mask_shl_18:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: psllq $18, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i64_x_2_140737488289792_mask_shl_18:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpsllq $18, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 140737488289792, i64 140737488289792>
%t1 = shl <2 x i64> %t0, <i64 18, i64 18>
ret <2 x i64> %t1
}
define <2 x i64> @test_128_i64_x_2_18446744065119617024_mask_shl_1(<2 x i64> %a0) {
-; X32-SSE2ONLY-LABEL: test_128_i64_x_2_18446744065119617024_mask_shl_1:
-; X32-SSE2ONLY: # %bb.0:
-; X32-SSE2ONLY-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE2ONLY-NEXT: paddq %xmm0, %xmm0
-; X32-SSE2ONLY-NEXT: retl
-;
-; X32-SSE2AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_shl_1:
-; X32-SSE2AVX: # %bb.0:
-; X32-SSE2AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: vpaddq %xmm0, %xmm0, %xmm0
-; X32-SSE2AVX-NEXT: retl
-;
-; X64-SSE2ONLY-LABEL: test_128_i64_x_2_18446744065119617024_mask_shl_1:
-; X64-SSE2ONLY: # %bb.0:
-; X64-SSE2ONLY-NEXT: pand {{.*}}(%rip), %xmm0
-; X64-SSE2ONLY-NEXT: paddq %xmm0, %xmm0
-; X64-SSE2ONLY-NEXT: retq
-;
-; X64-SSE2AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_shl_1:
-; X64-SSE2AVX: # %bb.0:
-; X64-SSE2AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: vpaddq %xmm0, %xmm0, %xmm0
-; X64-SSE2AVX-NEXT: retq
+; X86-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_shl_1:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
+; X86-SSE2-NEXT: paddq %xmm0, %xmm0
+; X86-SSE2-NEXT: retl
+;
+; X86-AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_shl_1:
+; X86-AVX: # %bb.0:
+; X86-AVX-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX-NEXT: vpaddq %xmm0, %xmm0, %xmm0
+; X86-AVX-NEXT: retl
+;
+; X64-SSE2-LABEL: test_128_i64_x_2_18446744065119617024_mask_shl_1:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: pand {{.*}}(%rip), %xmm0
+; X64-SSE2-NEXT: paddq %xmm0, %xmm0
+; X64-SSE2-NEXT: retq
+;
+; X64-AVX-LABEL: test_128_i64_x_2_18446744065119617024_mask_shl_1:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX-NEXT: vpaddq %xmm0, %xmm0, %xmm0
+; X64-AVX-NEXT: retq
%t0 = and <2 x i64> %a0, <i64 18446744065119617024, i64 18446744065119617024>
%t1 = shl <2 x i64> %t0, <i64 1, i64 1>
ret <2 x i64> %t1
diff --git a/llvm/test/CodeGen/X86/volatile.ll b/llvm/test/CodeGen/X86/volatile.ll
index a4f52dd4ca0a..8e293e44e86d 100644
--- a/llvm/test/CodeGen/X86/volatile.ll
+++ b/llvm/test/CodeGen/X86/volatile.ll
@@ -1,18 +1,18 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=sse2 | FileCheck %s -check-prefixes=ALL,OPT
-; RUN: llc < %s -mtriple=i686-- -mattr=sse2 -O0 | FileCheck %s --check-prefixes=ALL,NOOPT
+; RUN: llc < %s -mtriple=i686-- -mattr=sse2 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=sse2 -O0 | FileCheck %s
@x = external global double
define void @foo() nounwind {
-; ALL-LABEL: foo:
-; ALL: # %bb.0:
-; ALL-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; ALL-NEXT: xorps %xmm0, %xmm0
-; ALL-NEXT: movsd %xmm0, x
-; ALL-NEXT: movsd %xmm0, x
-; ALL-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; ALL-NEXT: retl
+; CHECK-LABEL: foo:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; CHECK-NEXT: xorps %xmm0, %xmm0
+; CHECK-NEXT: movsd %xmm0, x
+; CHECK-NEXT: movsd %xmm0, x
+; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; CHECK-NEXT: retl
%a = load volatile double, double* @x
store volatile double 0.0, double* @x
store volatile double 0.0, double* @x
@@ -21,10 +21,10 @@ define void @foo() nounwind {
}
define void @bar() nounwind {
-; ALL-LABEL: bar:
-; ALL: # %bb.0:
-; ALL-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; ALL-NEXT: retl
+; CHECK-LABEL: bar:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; CHECK-NEXT: retl
%c = load volatile double, double* @x
ret void
}
diff --git a/llvm/test/CodeGen/X86/vsel-cmp-load.ll b/llvm/test/CodeGen/X86/vsel-cmp-load.ll
index 345a50450d74..b6d468324a9e 100644
--- a/llvm/test/CodeGen/X86/vsel-cmp-load.ll
+++ b/llvm/test/CodeGen/X86/vsel-cmp-load.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefixes=ALL,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefixes=ALL,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512bw,avx512vl,avx512f | FileCheck %s --check-prefixes=ALL,AVX512
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=AVX1
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefix=AVX2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512bw,avx512vl,avx512f | FileCheck %s --check-prefix=AVX512
; PR37427 - https://bugs.llvm.org/show_bug.cgi?id=37427
diff --git a/llvm/test/CodeGen/X86/vselect-2.ll b/llvm/test/CodeGen/X86/vselect-2.ll
index c751b7a7c87e..c02cbcf55408 100644
--- a/llvm/test/CodeGen/X86/vselect-2.ll
+++ b/llvm/test/CodeGen/X86/vselect-2.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
define <4 x i32> @test1(<4 x i32> %A, <4 x i32> %B) {
; SSE2-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/vselect-constants.ll b/llvm/test/CodeGen/X86/vselect-constants.ll
index f0ac42d1455f..169aa0551373 100644
--- a/llvm/test/CodeGen/X86/vselect-constants.ll
+++ b/llvm/test/CodeGen/X86/vselect-constants.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse2 | FileCheck %s --check-prefix=SSE
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=AVX
; First, check the generic pattern for any 2 vector constants. Then, check special cases where
; the constants are all off-by-one. Finally, check the extra special cases where the constants
@@ -8,9 +8,9 @@
; Each minimal select test is repeated with a more typical pattern that includes a compare to
; generate the condition value.
-; TODO: If we don't have blendv, this can definitely be improved. There's also a selection of
+; TODO: If we don't have blendv, this can definitely be improved. There's also a selection of
; chips where it makes sense to transform the general case blendv to 2 bit-ops. That should be
-; a uarch-specfic transform. At some point (Ryzen?), the implementation should catch up to the
+; a uarch-specfic transform. At some point (Ryzen?), the implementation should catch up to the
; architecture, so blendv is as fast as a single bit-op.
define <4 x i32> @sel_C1_or_C2_vec(<4 x i1> %cond) {
diff --git a/llvm/test/CodeGen/X86/vselect-minmax.ll b/llvm/test/CodeGen/X86/vselect-minmax.ll
index af64a2b90fe2..23a3ca3fae12 100644
--- a/llvm/test/CodeGen/X86/vselect-minmax.ll
+++ b/llvm/test/CodeGen/X86/vselect-minmax.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE4
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl | FileCheck %s --check-prefix=AVX --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefix=AVX --check-prefix=AVX512F --check-prefix=AVX512BW --check-prefix=AVX512VL
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE4
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BW
define <16 x i8> @test1(<16 x i8> %a, <16 x i8> %b) {
; SSE2-LABEL: test1:
@@ -575,10 +575,10 @@ define <32 x i8> @test25(<32 x i8> %a, <32 x i8> %b) {
; AVX2-NEXT: vpminsb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test25:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminsb %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test25:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminsb %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp slt <32 x i8> %a, %b
%sel = select <32 x i1> %cmp, <32 x i8> %a, <32 x i8> %b
@@ -620,10 +620,10 @@ define <32 x i8> @test26(<32 x i8> %a, <32 x i8> %b) {
; AVX2-NEXT: vpminsb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test26:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminsb %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test26:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminsb %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sle <32 x i8> %a, %b
%sel = select <32 x i1> %cmp, <32 x i8> %a, <32 x i8> %b
@@ -667,10 +667,10 @@ define <32 x i8> @test27(<32 x i8> %a, <32 x i8> %b) {
; AVX2-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test27:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test27:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sgt <32 x i8> %a, %b
%sel = select <32 x i1> %cmp, <32 x i8> %a, <32 x i8> %b
@@ -714,10 +714,10 @@ define <32 x i8> @test28(<32 x i8> %a, <32 x i8> %b) {
; AVX2-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test28:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test28:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sge <32 x i8> %a, %b
%sel = select <32 x i1> %cmp, <32 x i8> %a, <32 x i8> %b
@@ -745,10 +745,10 @@ define <32 x i8> @test29(<32 x i8> %a, <32 x i8> %b) {
; AVX2-NEXT: vpminub %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test29:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminub %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test29:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminub %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ult <32 x i8> %a, %b
%sel = select <32 x i1> %cmp, <32 x i8> %a, <32 x i8> %b
@@ -776,10 +776,10 @@ define <32 x i8> @test30(<32 x i8> %a, <32 x i8> %b) {
; AVX2-NEXT: vpminub %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test30:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminub %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test30:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminub %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ule <32 x i8> %a, %b
%sel = select <32 x i1> %cmp, <32 x i8> %a, <32 x i8> %b
@@ -807,10 +807,10 @@ define <32 x i8> @test31(<32 x i8> %a, <32 x i8> %b) {
; AVX2-NEXT: vpmaxub %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test31:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxub %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test31:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxub %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ugt <32 x i8> %a, %b
%sel = select <32 x i1> %cmp, <32 x i8> %a, <32 x i8> %b
@@ -838,10 +838,10 @@ define <32 x i8> @test32(<32 x i8> %a, <32 x i8> %b) {
; AVX2-NEXT: vpmaxub %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test32:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxub %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test32:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxub %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp uge <32 x i8> %a, %b
%sel = select <32 x i1> %cmp, <32 x i8> %a, <32 x i8> %b
@@ -869,10 +869,10 @@ define <16 x i16> @test33(<16 x i16> %a, <16 x i16> %b) {
; AVX2-NEXT: vpminsw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test33:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminsw %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test33:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminsw %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp slt <16 x i16> %a, %b
%sel = select <16 x i1> %cmp, <16 x i16> %a, <16 x i16> %b
@@ -900,10 +900,10 @@ define <16 x i16> @test34(<16 x i16> %a, <16 x i16> %b) {
; AVX2-NEXT: vpminsw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test34:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminsw %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test34:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminsw %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sle <16 x i16> %a, %b
%sel = select <16 x i1> %cmp, <16 x i16> %a, <16 x i16> %b
@@ -931,10 +931,10 @@ define <16 x i16> @test35(<16 x i16> %a, <16 x i16> %b) {
; AVX2-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test35:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test35:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sgt <16 x i16> %a, %b
%sel = select <16 x i1> %cmp, <16 x i16> %a, <16 x i16> %b
@@ -962,10 +962,10 @@ define <16 x i16> @test36(<16 x i16> %a, <16 x i16> %b) {
; AVX2-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test36:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test36:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sge <16 x i16> %a, %b
%sel = select <16 x i1> %cmp, <16 x i16> %a, <16 x i16> %b
@@ -1003,10 +1003,10 @@ define <16 x i16> @test37(<16 x i16> %a, <16 x i16> %b) {
; AVX2-NEXT: vpminuw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test37:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminuw %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test37:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminuw %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ult <16 x i16> %a, %b
%sel = select <16 x i1> %cmp, <16 x i16> %a, <16 x i16> %b
@@ -1044,10 +1044,10 @@ define <16 x i16> @test38(<16 x i16> %a, <16 x i16> %b) {
; AVX2-NEXT: vpminuw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test38:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminuw %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test38:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminuw %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ule <16 x i16> %a, %b
%sel = select <16 x i1> %cmp, <16 x i16> %a, <16 x i16> %b
@@ -1083,10 +1083,10 @@ define <16 x i16> @test39(<16 x i16> %a, <16 x i16> %b) {
; AVX2-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test39:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test39:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ugt <16 x i16> %a, %b
%sel = select <16 x i1> %cmp, <16 x i16> %a, <16 x i16> %b
@@ -1122,10 +1122,10 @@ define <16 x i16> @test40(<16 x i16> %a, <16 x i16> %b) {
; AVX2-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test40:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test40:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp uge <16 x i16> %a, %b
%sel = select <16 x i1> %cmp, <16 x i16> %a, <16 x i16> %b
@@ -1167,10 +1167,10 @@ define <8 x i32> @test41(<8 x i32> %a, <8 x i32> %b) {
; AVX2-NEXT: vpminsd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test41:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminsd %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test41:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminsd %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp slt <8 x i32> %a, %b
%sel = select <8 x i1> %cmp, <8 x i32> %a, <8 x i32> %b
@@ -1212,10 +1212,10 @@ define <8 x i32> @test42(<8 x i32> %a, <8 x i32> %b) {
; AVX2-NEXT: vpminsd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test42:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminsd %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test42:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminsd %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sle <8 x i32> %a, %b
%sel = select <8 x i1> %cmp, <8 x i32> %a, <8 x i32> %b
@@ -1259,10 +1259,10 @@ define <8 x i32> @test43(<8 x i32> %a, <8 x i32> %b) {
; AVX2-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test43:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test43:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sgt <8 x i32> %a, %b
%sel = select <8 x i1> %cmp, <8 x i32> %a, <8 x i32> %b
@@ -1306,10 +1306,10 @@ define <8 x i32> @test44(<8 x i32> %a, <8 x i32> %b) {
; AVX2-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test44:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test44:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sge <8 x i32> %a, %b
%sel = select <8 x i1> %cmp, <8 x i32> %a, <8 x i32> %b
@@ -1357,10 +1357,10 @@ define <8 x i32> @test45(<8 x i32> %a, <8 x i32> %b) {
; AVX2-NEXT: vpminud %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test45:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminud %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test45:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminud %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ult <8 x i32> %a, %b
%sel = select <8 x i1> %cmp, <8 x i32> %a, <8 x i32> %b
@@ -1408,10 +1408,10 @@ define <8 x i32> @test46(<8 x i32> %a, <8 x i32> %b) {
; AVX2-NEXT: vpminud %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test46:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminud %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test46:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminud %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ule <8 x i32> %a, %b
%sel = select <8 x i1> %cmp, <8 x i32> %a, <8 x i32> %b
@@ -1460,10 +1460,10 @@ define <8 x i32> @test47(<8 x i32> %a, <8 x i32> %b) {
; AVX2-NEXT: vpmaxud %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test47:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxud %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test47:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxud %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ugt <8 x i32> %a, %b
%sel = select <8 x i1> %cmp, <8 x i32> %a, <8 x i32> %b
@@ -1512,10 +1512,10 @@ define <8 x i32> @test48(<8 x i32> %a, <8 x i32> %b) {
; AVX2-NEXT: vpmaxud %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test48:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxud %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test48:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxud %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp uge <8 x i32> %a, %b
%sel = select <8 x i1> %cmp, <8 x i32> %a, <8 x i32> %b
@@ -2093,10 +2093,10 @@ define <32 x i8> @test73(<32 x i8> %a, <32 x i8> %b) {
; AVX2-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test73:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test73:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp slt <32 x i8> %a, %b
%sel = select <32 x i1> %cmp, <32 x i8> %b, <32 x i8> %a
@@ -2140,10 +2140,10 @@ define <32 x i8> @test74(<32 x i8> %a, <32 x i8> %b) {
; AVX2-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test74:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test74:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sle <32 x i8> %a, %b
%sel = select <32 x i1> %cmp, <32 x i8> %b, <32 x i8> %a
@@ -2185,10 +2185,10 @@ define <32 x i8> @test75(<32 x i8> %a, <32 x i8> %b) {
; AVX2-NEXT: vpminsb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test75:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminsb %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test75:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminsb %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sgt <32 x i8> %a, %b
%sel = select <32 x i1> %cmp, <32 x i8> %b, <32 x i8> %a
@@ -2230,10 +2230,10 @@ define <32 x i8> @test76(<32 x i8> %a, <32 x i8> %b) {
; AVX2-NEXT: vpminsb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test76:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminsb %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test76:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminsb %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sge <32 x i8> %a, %b
%sel = select <32 x i1> %cmp, <32 x i8> %b, <32 x i8> %a
@@ -2261,10 +2261,10 @@ define <32 x i8> @test77(<32 x i8> %a, <32 x i8> %b) {
; AVX2-NEXT: vpmaxub %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test77:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxub %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test77:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxub %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ult <32 x i8> %a, %b
%sel = select <32 x i1> %cmp, <32 x i8> %b, <32 x i8> %a
@@ -2292,10 +2292,10 @@ define <32 x i8> @test78(<32 x i8> %a, <32 x i8> %b) {
; AVX2-NEXT: vpmaxub %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test78:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxub %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test78:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxub %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ule <32 x i8> %a, %b
%sel = select <32 x i1> %cmp, <32 x i8> %b, <32 x i8> %a
@@ -2323,10 +2323,10 @@ define <32 x i8> @test79(<32 x i8> %a, <32 x i8> %b) {
; AVX2-NEXT: vpminub %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test79:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminub %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test79:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminub %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ugt <32 x i8> %a, %b
%sel = select <32 x i1> %cmp, <32 x i8> %b, <32 x i8> %a
@@ -2354,10 +2354,10 @@ define <32 x i8> @test80(<32 x i8> %a, <32 x i8> %b) {
; AVX2-NEXT: vpminub %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test80:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminub %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test80:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminub %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp uge <32 x i8> %a, %b
%sel = select <32 x i1> %cmp, <32 x i8> %b, <32 x i8> %a
@@ -2385,10 +2385,10 @@ define <16 x i16> @test81(<16 x i16> %a, <16 x i16> %b) {
; AVX2-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test81:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test81:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp slt <16 x i16> %a, %b
%sel = select <16 x i1> %cmp, <16 x i16> %b, <16 x i16> %a
@@ -2416,10 +2416,10 @@ define <16 x i16> @test82(<16 x i16> %a, <16 x i16> %b) {
; AVX2-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test82:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test82:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sle <16 x i16> %a, %b
%sel = select <16 x i1> %cmp, <16 x i16> %b, <16 x i16> %a
@@ -2447,10 +2447,10 @@ define <16 x i16> @test83(<16 x i16> %a, <16 x i16> %b) {
; AVX2-NEXT: vpminsw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test83:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminsw %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test83:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminsw %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sgt <16 x i16> %a, %b
%sel = select <16 x i1> %cmp, <16 x i16> %b, <16 x i16> %a
@@ -2478,10 +2478,10 @@ define <16 x i16> @test84(<16 x i16> %a, <16 x i16> %b) {
; AVX2-NEXT: vpminsw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test84:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminsw %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test84:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminsw %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sge <16 x i16> %a, %b
%sel = select <16 x i1> %cmp, <16 x i16> %b, <16 x i16> %a
@@ -2517,10 +2517,10 @@ define <16 x i16> @test85(<16 x i16> %a, <16 x i16> %b) {
; AVX2-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test85:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test85:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ult <16 x i16> %a, %b
%sel = select <16 x i1> %cmp, <16 x i16> %b, <16 x i16> %a
@@ -2556,10 +2556,10 @@ define <16 x i16> @test86(<16 x i16> %a, <16 x i16> %b) {
; AVX2-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test86:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test86:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ule <16 x i16> %a, %b
%sel = select <16 x i1> %cmp, <16 x i16> %b, <16 x i16> %a
@@ -2597,10 +2597,10 @@ define <16 x i16> @test87(<16 x i16> %a, <16 x i16> %b) {
; AVX2-NEXT: vpminuw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test87:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminuw %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test87:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminuw %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ugt <16 x i16> %a, %b
%sel = select <16 x i1> %cmp, <16 x i16> %b, <16 x i16> %a
@@ -2638,10 +2638,10 @@ define <16 x i16> @test88(<16 x i16> %a, <16 x i16> %b) {
; AVX2-NEXT: vpminuw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test88:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminuw %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test88:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminuw %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp uge <16 x i16> %a, %b
%sel = select <16 x i1> %cmp, <16 x i16> %b, <16 x i16> %a
@@ -2685,10 +2685,10 @@ define <8 x i32> @test89(<8 x i32> %a, <8 x i32> %b) {
; AVX2-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test89:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test89:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp slt <8 x i32> %a, %b
%sel = select <8 x i1> %cmp, <8 x i32> %b, <8 x i32> %a
@@ -2732,10 +2732,10 @@ define <8 x i32> @test90(<8 x i32> %a, <8 x i32> %b) {
; AVX2-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test90:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test90:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sle <8 x i32> %a, %b
%sel = select <8 x i1> %cmp, <8 x i32> %b, <8 x i32> %a
@@ -2777,10 +2777,10 @@ define <8 x i32> @test91(<8 x i32> %a, <8 x i32> %b) {
; AVX2-NEXT: vpminsd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test91:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminsd %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test91:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminsd %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sgt <8 x i32> %a, %b
%sel = select <8 x i1> %cmp, <8 x i32> %b, <8 x i32> %a
@@ -2822,10 +2822,10 @@ define <8 x i32> @test92(<8 x i32> %a, <8 x i32> %b) {
; AVX2-NEXT: vpminsd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test92:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminsd %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test92:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminsd %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sge <8 x i32> %a, %b
%sel = select <8 x i1> %cmp, <8 x i32> %b, <8 x i32> %a
@@ -2874,10 +2874,10 @@ define <8 x i32> @test93(<8 x i32> %a, <8 x i32> %b) {
; AVX2-NEXT: vpmaxud %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test93:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxud %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test93:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxud %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ult <8 x i32> %a, %b
%sel = select <8 x i1> %cmp, <8 x i32> %b, <8 x i32> %a
@@ -2926,10 +2926,10 @@ define <8 x i32> @test94(<8 x i32> %a, <8 x i32> %b) {
; AVX2-NEXT: vpmaxud %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test94:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxud %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test94:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxud %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ule <8 x i32> %a, %b
%sel = select <8 x i1> %cmp, <8 x i32> %b, <8 x i32> %a
@@ -2977,10 +2977,10 @@ define <8 x i32> @test95(<8 x i32> %a, <8 x i32> %b) {
; AVX2-NEXT: vpminud %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test95:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminud %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test95:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminud %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ugt <8 x i32> %a, %b
%sel = select <8 x i1> %cmp, <8 x i32> %b, <8 x i32> %a
@@ -3028,10 +3028,10 @@ define <8 x i32> @test96(<8 x i32> %a, <8 x i32> %b) {
; AVX2-NEXT: vpminud %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test96:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminud %ymm1, %ymm0, %ymm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test96:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminud %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp uge <8 x i32> %a, %b
%sel = select <8 x i1> %cmp, <8 x i32> %b, <8 x i32> %a
@@ -3093,6 +3093,15 @@ define <64 x i8> @test97(<64 x i8> %a, <64 x i8> %b) {
; AVX2-NEXT: vpminsb %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test97:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpminsb %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpminsb %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test97:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminsb %zmm1, %zmm0, %zmm0
@@ -3156,6 +3165,15 @@ define <64 x i8> @test98(<64 x i8> %a, <64 x i8> %b) {
; AVX2-NEXT: vpminsb %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test98:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpminsb %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpminsb %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test98:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminsb %zmm1, %zmm0, %zmm0
@@ -3223,6 +3241,15 @@ define <64 x i8> @test99(<64 x i8> %a, <64 x i8> %b) {
; AVX2-NEXT: vpmaxsb %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test99:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpmaxsb %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test99:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxsb %zmm1, %zmm0, %zmm0
@@ -3290,6 +3317,15 @@ define <64 x i8> @test100(<64 x i8> %a, <64 x i8> %b) {
; AVX2-NEXT: vpmaxsb %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test100:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpmaxsb %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test100:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxsb %zmm1, %zmm0, %zmm0
@@ -3329,6 +3365,15 @@ define <64 x i8> @test101(<64 x i8> %a, <64 x i8> %b) {
; AVX2-NEXT: vpminub %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test101:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpminub %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpminub %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test101:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminub %zmm1, %zmm0, %zmm0
@@ -3368,6 +3413,15 @@ define <64 x i8> @test102(<64 x i8> %a, <64 x i8> %b) {
; AVX2-NEXT: vpminub %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test102:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpminub %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpminub %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test102:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminub %zmm1, %zmm0, %zmm0
@@ -3407,6 +3461,15 @@ define <64 x i8> @test103(<64 x i8> %a, <64 x i8> %b) {
; AVX2-NEXT: vpmaxub %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test103:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpmaxub %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpmaxub %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test103:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxub %zmm1, %zmm0, %zmm0
@@ -3446,6 +3509,15 @@ define <64 x i8> @test104(<64 x i8> %a, <64 x i8> %b) {
; AVX2-NEXT: vpmaxub %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test104:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpmaxub %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpmaxub %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test104:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxub %zmm1, %zmm0, %zmm0
@@ -3485,6 +3557,15 @@ define <32 x i16> @test105(<32 x i16> %a, <32 x i16> %b) {
; AVX2-NEXT: vpminsw %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test105:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpminsw %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpminsw %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test105:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminsw %zmm1, %zmm0, %zmm0
@@ -3524,6 +3605,15 @@ define <32 x i16> @test106(<32 x i16> %a, <32 x i16> %b) {
; AVX2-NEXT: vpminsw %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test106:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpminsw %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpminsw %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test106:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminsw %zmm1, %zmm0, %zmm0
@@ -3563,6 +3653,15 @@ define <32 x i16> @test107(<32 x i16> %a, <32 x i16> %b) {
; AVX2-NEXT: vpmaxsw %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test107:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpmaxsw %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test107:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxsw %zmm1, %zmm0, %zmm0
@@ -3602,6 +3701,15 @@ define <32 x i16> @test108(<32 x i16> %a, <32 x i16> %b) {
; AVX2-NEXT: vpmaxsw %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test108:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpmaxsw %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test108:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxsw %zmm1, %zmm0, %zmm0
@@ -3657,6 +3765,15 @@ define <32 x i16> @test109(<32 x i16> %a, <32 x i16> %b) {
; AVX2-NEXT: vpminuw %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test109:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpminuw %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpminuw %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test109:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminuw %zmm1, %zmm0, %zmm0
@@ -3712,6 +3829,15 @@ define <32 x i16> @test110(<32 x i16> %a, <32 x i16> %b) {
; AVX2-NEXT: vpminuw %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test110:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpminuw %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpminuw %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test110:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminuw %zmm1, %zmm0, %zmm0
@@ -3763,6 +3889,15 @@ define <32 x i16> @test111(<32 x i16> %a, <32 x i16> %b) {
; AVX2-NEXT: vpmaxuw %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test111:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpmaxuw %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test111:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxuw %zmm1, %zmm0, %zmm0
@@ -3814,6 +3949,15 @@ define <32 x i16> @test112(<32 x i16> %a, <32 x i16> %b) {
; AVX2-NEXT: vpmaxuw %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test112:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpmaxuw %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test112:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxuw %zmm1, %zmm0, %zmm0
@@ -3877,10 +4021,10 @@ define <16 x i32> @test113(<16 x i32> %a, <16 x i32> %b) {
; AVX2-NEXT: vpminsd %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test113:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminsd %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test113:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminsd %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp slt <16 x i32> %a, %b
%sel = select <16 x i1> %cmp, <16 x i32> %a, <16 x i32> %b
@@ -3940,10 +4084,10 @@ define <16 x i32> @test114(<16 x i32> %a, <16 x i32> %b) {
; AVX2-NEXT: vpminsd %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test114:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminsd %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test114:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminsd %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sle <16 x i32> %a, %b
%sel = select <16 x i1> %cmp, <16 x i32> %a, <16 x i32> %b
@@ -4007,10 +4151,10 @@ define <16 x i32> @test115(<16 x i32> %a, <16 x i32> %b) {
; AVX2-NEXT: vpmaxsd %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test115:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxsd %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test115:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxsd %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sgt <16 x i32> %a, %b
%sel = select <16 x i1> %cmp, <16 x i32> %a, <16 x i32> %b
@@ -4074,10 +4218,10 @@ define <16 x i32> @test116(<16 x i32> %a, <16 x i32> %b) {
; AVX2-NEXT: vpmaxsd %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test116:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxsd %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test116:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxsd %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sge <16 x i32> %a, %b
%sel = select <16 x i1> %cmp, <16 x i32> %a, <16 x i32> %b
@@ -4149,10 +4293,10 @@ define <16 x i32> @test117(<16 x i32> %a, <16 x i32> %b) {
; AVX2-NEXT: vpminud %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test117:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminud %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test117:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminud %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ult <16 x i32> %a, %b
%sel = select <16 x i1> %cmp, <16 x i32> %a, <16 x i32> %b
@@ -4224,10 +4368,10 @@ define <16 x i32> @test118(<16 x i32> %a, <16 x i32> %b) {
; AVX2-NEXT: vpminud %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test118:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminud %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test118:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminud %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ule <16 x i32> %a, %b
%sel = select <16 x i1> %cmp, <16 x i32> %a, <16 x i32> %b
@@ -4301,10 +4445,10 @@ define <16 x i32> @test119(<16 x i32> %a, <16 x i32> %b) {
; AVX2-NEXT: vpmaxud %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test119:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxud %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test119:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxud %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ugt <16 x i32> %a, %b
%sel = select <16 x i1> %cmp, <16 x i32> %a, <16 x i32> %b
@@ -4378,10 +4522,10 @@ define <16 x i32> @test120(<16 x i32> %a, <16 x i32> %b) {
; AVX2-NEXT: vpmaxud %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test120:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxud %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test120:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxud %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp uge <16 x i32> %a, %b
%sel = select <16 x i1> %cmp, <16 x i32> %a, <16 x i32> %b
@@ -4499,10 +4643,10 @@ define <8 x i64> @test121(<8 x i64> %a, <8 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm1, %ymm3, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test121:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminsq %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test121:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminsq %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp slt <8 x i64> %a, %b
%sel = select <8 x i1> %cmp, <8 x i64> %a, <8 x i64> %b
@@ -4620,10 +4764,10 @@ define <8 x i64> @test122(<8 x i64> %a, <8 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm1, %ymm3, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test122:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminsq %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test122:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminsq %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sle <8 x i64> %a, %b
%sel = select <8 x i1> %cmp, <8 x i64> %a, <8 x i64> %b
@@ -4740,10 +4884,10 @@ define <8 x i64> @test123(<8 x i64> %a, <8 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm1, %ymm3, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test123:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test123:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sgt <8 x i64> %a, %b
%sel = select <8 x i1> %cmp, <8 x i64> %a, <8 x i64> %b
@@ -4860,10 +5004,10 @@ define <8 x i64> @test124(<8 x i64> %a, <8 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm1, %ymm3, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test124:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test124:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sge <8 x i64> %a, %b
%sel = select <8 x i1> %cmp, <8 x i64> %a, <8 x i64> %b
@@ -5010,10 +5154,10 @@ define <8 x i64> @test125(<8 x i64> %a, <8 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm1, %ymm3, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test125:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminuq %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test125:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminuq %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ult <8 x i64> %a, %b
%sel = select <8 x i1> %cmp, <8 x i64> %a, <8 x i64> %b
@@ -5160,10 +5304,10 @@ define <8 x i64> @test126(<8 x i64> %a, <8 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm1, %ymm3, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test126:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminuq %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test126:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminuq %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ule <8 x i64> %a, %b
%sel = select <8 x i1> %cmp, <8 x i64> %a, <8 x i64> %b
@@ -5309,10 +5453,10 @@ define <8 x i64> @test127(<8 x i64> %a, <8 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm1, %ymm3, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test127:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test127:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ugt <8 x i64> %a, %b
%sel = select <8 x i1> %cmp, <8 x i64> %a, <8 x i64> %b
@@ -5458,10 +5602,10 @@ define <8 x i64> @test128(<8 x i64> %a, <8 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm1, %ymm3, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test128:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test128:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp uge <8 x i64> %a, %b
%sel = select <8 x i1> %cmp, <8 x i64> %a, <8 x i64> %b
@@ -5525,6 +5669,15 @@ define <64 x i8> @test129(<64 x i8> %a, <64 x i8> %b) {
; AVX2-NEXT: vpmaxsb %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test129:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpmaxsb %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test129:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxsb %zmm1, %zmm0, %zmm0
@@ -5592,6 +5745,15 @@ define <64 x i8> @test130(<64 x i8> %a, <64 x i8> %b) {
; AVX2-NEXT: vpmaxsb %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test130:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpmaxsb %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test130:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxsb %zmm1, %zmm0, %zmm0
@@ -5655,6 +5817,15 @@ define <64 x i8> @test131(<64 x i8> %a, <64 x i8> %b) {
; AVX2-NEXT: vpminsb %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test131:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpminsb %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpminsb %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test131:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminsb %zmm1, %zmm0, %zmm0
@@ -5718,6 +5889,15 @@ define <64 x i8> @test132(<64 x i8> %a, <64 x i8> %b) {
; AVX2-NEXT: vpminsb %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test132:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpminsb %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpminsb %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test132:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminsb %zmm1, %zmm0, %zmm0
@@ -5757,6 +5937,15 @@ define <64 x i8> @test133(<64 x i8> %a, <64 x i8> %b) {
; AVX2-NEXT: vpmaxub %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test133:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpmaxub %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpmaxub %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test133:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxub %zmm1, %zmm0, %zmm0
@@ -5796,6 +5985,15 @@ define <64 x i8> @test134(<64 x i8> %a, <64 x i8> %b) {
; AVX2-NEXT: vpmaxub %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test134:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpmaxub %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpmaxub %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test134:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxub %zmm1, %zmm0, %zmm0
@@ -5835,6 +6033,15 @@ define <64 x i8> @test135(<64 x i8> %a, <64 x i8> %b) {
; AVX2-NEXT: vpminub %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test135:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpminub %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpminub %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test135:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminub %zmm1, %zmm0, %zmm0
@@ -5874,6 +6081,15 @@ define <64 x i8> @test136(<64 x i8> %a, <64 x i8> %b) {
; AVX2-NEXT: vpminub %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test136:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpminub %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpminub %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test136:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminub %zmm1, %zmm0, %zmm0
@@ -5913,6 +6129,15 @@ define <32 x i16> @test137(<32 x i16> %a, <32 x i16> %b) {
; AVX2-NEXT: vpmaxsw %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test137:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpmaxsw %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test137:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxsw %zmm1, %zmm0, %zmm0
@@ -5952,6 +6177,15 @@ define <32 x i16> @test138(<32 x i16> %a, <32 x i16> %b) {
; AVX2-NEXT: vpmaxsw %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test138:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpmaxsw %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test138:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxsw %zmm1, %zmm0, %zmm0
@@ -5991,6 +6225,15 @@ define <32 x i16> @test139(<32 x i16> %a, <32 x i16> %b) {
; AVX2-NEXT: vpminsw %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test139:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpminsw %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpminsw %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test139:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminsw %zmm1, %zmm0, %zmm0
@@ -6030,6 +6273,15 @@ define <32 x i16> @test140(<32 x i16> %a, <32 x i16> %b) {
; AVX2-NEXT: vpminsw %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test140:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpminsw %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpminsw %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test140:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminsw %zmm1, %zmm0, %zmm0
@@ -6081,6 +6333,15 @@ define <32 x i16> @test141(<32 x i16> %a, <32 x i16> %b) {
; AVX2-NEXT: vpmaxuw %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test141:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpmaxuw %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test141:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxuw %zmm1, %zmm0, %zmm0
@@ -6132,6 +6393,15 @@ define <32 x i16> @test142(<32 x i16> %a, <32 x i16> %b) {
; AVX2-NEXT: vpmaxuw %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test142:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpmaxuw %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test142:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxuw %zmm1, %zmm0, %zmm0
@@ -6187,6 +6457,15 @@ define <32 x i16> @test143(<32 x i16> %a, <32 x i16> %b) {
; AVX2-NEXT: vpminuw %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test143:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpminuw %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpminuw %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test143:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminuw %zmm1, %zmm0, %zmm0
@@ -6242,6 +6521,15 @@ define <32 x i16> @test144(<32 x i16> %a, <32 x i16> %b) {
; AVX2-NEXT: vpminuw %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test144:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512F-NEXT: vpminuw %ymm2, %ymm3, %ymm2
+; AVX512F-NEXT: vpminuw %ymm1, %ymm0, %ymm0
+; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test144:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminuw %zmm1, %zmm0, %zmm0
@@ -6309,10 +6597,10 @@ define <16 x i32> @test145(<16 x i32> %a, <16 x i32> %b) {
; AVX2-NEXT: vpmaxsd %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test145:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxsd %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test145:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxsd %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp slt <16 x i32> %a, %b
%sel = select <16 x i1> %cmp, <16 x i32> %b, <16 x i32> %a
@@ -6376,10 +6664,10 @@ define <16 x i32> @test146(<16 x i32> %a, <16 x i32> %b) {
; AVX2-NEXT: vpmaxsd %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test146:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxsd %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test146:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxsd %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sle <16 x i32> %a, %b
%sel = select <16 x i1> %cmp, <16 x i32> %b, <16 x i32> %a
@@ -6439,10 +6727,10 @@ define <16 x i32> @test147(<16 x i32> %a, <16 x i32> %b) {
; AVX2-NEXT: vpminsd %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test147:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminsd %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test147:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminsd %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sgt <16 x i32> %a, %b
%sel = select <16 x i1> %cmp, <16 x i32> %b, <16 x i32> %a
@@ -6502,10 +6790,10 @@ define <16 x i32> @test148(<16 x i32> %a, <16 x i32> %b) {
; AVX2-NEXT: vpminsd %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test148:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminsd %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test148:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminsd %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sge <16 x i32> %a, %b
%sel = select <16 x i1> %cmp, <16 x i32> %b, <16 x i32> %a
@@ -6579,10 +6867,10 @@ define <16 x i32> @test149(<16 x i32> %a, <16 x i32> %b) {
; AVX2-NEXT: vpmaxud %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test149:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxud %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test149:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxud %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ult <16 x i32> %a, %b
%sel = select <16 x i1> %cmp, <16 x i32> %b, <16 x i32> %a
@@ -6656,10 +6944,10 @@ define <16 x i32> @test150(<16 x i32> %a, <16 x i32> %b) {
; AVX2-NEXT: vpmaxud %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test150:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxud %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test150:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxud %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ule <16 x i32> %a, %b
%sel = select <16 x i1> %cmp, <16 x i32> %b, <16 x i32> %a
@@ -6731,10 +7019,10 @@ define <16 x i32> @test151(<16 x i32> %a, <16 x i32> %b) {
; AVX2-NEXT: vpminud %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test151:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminud %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test151:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminud %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ugt <16 x i32> %a, %b
%sel = select <16 x i1> %cmp, <16 x i32> %b, <16 x i32> %a
@@ -6806,10 +7094,10 @@ define <16 x i32> @test152(<16 x i32> %a, <16 x i32> %b) {
; AVX2-NEXT: vpminud %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test152:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminud %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test152:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminud %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp uge <16 x i32> %a, %b
%sel = select <16 x i1> %cmp, <16 x i32> %b, <16 x i32> %a
@@ -6928,10 +7216,10 @@ define <8 x i64> @test153(<8 x i64> %a, <8 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm1, %ymm3, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test153:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test153:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp slt <8 x i64> %a, %b
%sel = select <8 x i1> %cmp, <8 x i64> %b, <8 x i64> %a
@@ -7048,10 +7336,10 @@ define <8 x i64> @test154(<8 x i64> %a, <8 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm1, %ymm3, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test154:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test154:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sle <8 x i64> %a, %b
%sel = select <8 x i1> %cmp, <8 x i64> %b, <8 x i64> %a
@@ -7169,10 +7457,10 @@ define <8 x i64> @test155(<8 x i64> %a, <8 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm1, %ymm3, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test155:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminsq %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test155:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminsq %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp sgt <8 x i64> %a, %b
%sel = select <8 x i1> %cmp, <8 x i64> %b, <8 x i64> %a
@@ -7318,10 +7606,10 @@ define <8 x i64> @test156(<8 x i64> %a, <8 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm1, %ymm3, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test156:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test156:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ule <8 x i64> %a, %b
%sel = select <8 x i1> %cmp, <8 x i64> %b, <8 x i64> %a
@@ -7468,10 +7756,10 @@ define <8 x i64> @test159(<8 x i64> %a, <8 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm1, %ymm3, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test159:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminuq %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test159:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminuq %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp ugt <8 x i64> %a, %b
%sel = select <8 x i1> %cmp, <8 x i64> %b, <8 x i64> %a
@@ -7618,10 +7906,10 @@ define <8 x i64> @test160(<8 x i64> %a, <8 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm1, %ymm3, %ymm1
; AVX2-NEXT: retq
;
-; AVX512F-LABEL: test160:
-; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpminuq %zmm1, %zmm0, %zmm0
-; AVX512F-NEXT: retq
+; AVX512-LABEL: test160:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vpminuq %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: retq
entry:
%cmp = icmp uge <8 x i64> %a, %b
%sel = select <8 x i1> %cmp, <8 x i64> %b, <8 x i64> %a
@@ -7692,6 +7980,14 @@ define <4 x i64> @test161(<4 x i64> %a, <4 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test161:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
+; AVX512F-NEXT: vpminsq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test161:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminsq %ymm1, %ymm0, %ymm0
@@ -7766,6 +8062,14 @@ define <4 x i64> @test162(<4 x i64> %a, <4 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test162:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
+; AVX512F-NEXT: vpminsq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test162:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminsq %ymm1, %ymm0, %ymm0
@@ -7839,6 +8143,14 @@ define <4 x i64> @test163(<4 x i64> %a, <4 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test163:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
+; AVX512F-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test163:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxsq %ymm1, %ymm0, %ymm0
@@ -7912,6 +8224,14 @@ define <4 x i64> @test164(<4 x i64> %a, <4 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test164:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
+; AVX512F-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test164:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxsq %ymm1, %ymm0, %ymm0
@@ -8001,6 +8321,14 @@ define <4 x i64> @test165(<4 x i64> %a, <4 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test165:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
+; AVX512F-NEXT: vpminuq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test165:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminuq %ymm1, %ymm0, %ymm0
@@ -8090,6 +8418,14 @@ define <4 x i64> @test166(<4 x i64> %a, <4 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test166:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
+; AVX512F-NEXT: vpminuq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test166:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminuq %ymm1, %ymm0, %ymm0
@@ -8178,6 +8514,14 @@ define <4 x i64> @test167(<4 x i64> %a, <4 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test167:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
+; AVX512F-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test167:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxuq %ymm1, %ymm0, %ymm0
@@ -8266,6 +8610,14 @@ define <4 x i64> @test168(<4 x i64> %a, <4 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test168:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
+; AVX512F-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test168:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxuq %ymm1, %ymm0, %ymm0
@@ -8339,6 +8691,14 @@ define <4 x i64> @test169(<4 x i64> %a, <4 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test169:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
+; AVX512F-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test169:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxsq %ymm1, %ymm0, %ymm0
@@ -8412,6 +8772,14 @@ define <4 x i64> @test170(<4 x i64> %a, <4 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test170:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
+; AVX512F-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test170:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxsq %ymm1, %ymm0, %ymm0
@@ -8486,6 +8854,14 @@ define <4 x i64> @test171(<4 x i64> %a, <4 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test171:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
+; AVX512F-NEXT: vpminsq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test171:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminsq %ymm1, %ymm0, %ymm0
@@ -8560,6 +8936,14 @@ define <4 x i64> @test172(<4 x i64> %a, <4 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test172:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
+; AVX512F-NEXT: vpminsq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test172:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminsq %ymm1, %ymm0, %ymm0
@@ -8648,6 +9032,14 @@ define <4 x i64> @test173(<4 x i64> %a, <4 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test173:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
+; AVX512F-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test173:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxuq %ymm1, %ymm0, %ymm0
@@ -8736,6 +9128,14 @@ define <4 x i64> @test174(<4 x i64> %a, <4 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test174:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
+; AVX512F-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test174:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxuq %ymm1, %ymm0, %ymm0
@@ -8825,6 +9225,14 @@ define <4 x i64> @test175(<4 x i64> %a, <4 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test175:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
+; AVX512F-NEXT: vpminuq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test175:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminuq %ymm1, %ymm0, %ymm0
@@ -8914,6 +9322,14 @@ define <4 x i64> @test176(<4 x i64> %a, <4 x i64> %b) {
; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test176:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
+; AVX512F-NEXT: vpminuq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test176:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminuq %ymm1, %ymm0, %ymm0
@@ -8965,6 +9381,14 @@ define <2 x i64> @test177(<2 x i64> %a, <2 x i64> %b) {
; AVX2-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test177:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512F-NEXT: vpminsq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test177:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminsq %xmm1, %xmm0, %xmm0
@@ -9016,6 +9440,14 @@ define <2 x i64> @test178(<2 x i64> %a, <2 x i64> %b) {
; AVX2-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test178:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512F-NEXT: vpminsq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test178:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminsq %xmm1, %xmm0, %xmm0
@@ -9066,6 +9498,14 @@ define <2 x i64> @test179(<2 x i64> %a, <2 x i64> %b) {
; AVX2-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test179:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512F-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test179:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxsq %xmm1, %xmm0, %xmm0
@@ -9116,6 +9556,14 @@ define <2 x i64> @test180(<2 x i64> %a, <2 x i64> %b) {
; AVX2-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test180:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512F-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test180:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxsq %xmm1, %xmm0, %xmm0
@@ -9176,6 +9624,14 @@ define <2 x i64> @test181(<2 x i64> %a, <2 x i64> %b) {
; AVX2-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test181:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512F-NEXT: vpminuq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test181:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminuq %xmm1, %xmm0, %xmm0
@@ -9236,6 +9692,14 @@ define <2 x i64> @test182(<2 x i64> %a, <2 x i64> %b) {
; AVX2-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test182:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512F-NEXT: vpminuq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test182:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminuq %xmm1, %xmm0, %xmm0
@@ -9296,6 +9760,14 @@ define <2 x i64> @test183(<2 x i64> %a, <2 x i64> %b) {
; AVX2-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test183:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512F-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test183:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxuq %xmm1, %xmm0, %xmm0
@@ -9356,6 +9828,14 @@ define <2 x i64> @test184(<2 x i64> %a, <2 x i64> %b) {
; AVX2-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test184:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512F-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test184:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxuq %xmm1, %xmm0, %xmm0
@@ -9406,6 +9886,14 @@ define <2 x i64> @test185(<2 x i64> %a, <2 x i64> %b) {
; AVX2-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test185:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512F-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test185:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxsq %xmm1, %xmm0, %xmm0
@@ -9456,6 +9944,14 @@ define <2 x i64> @test186(<2 x i64> %a, <2 x i64> %b) {
; AVX2-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test186:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512F-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test186:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxsq %xmm1, %xmm0, %xmm0
@@ -9507,6 +10003,14 @@ define <2 x i64> @test187(<2 x i64> %a, <2 x i64> %b) {
; AVX2-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test187:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512F-NEXT: vpminsq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test187:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminsq %xmm1, %xmm0, %xmm0
@@ -9558,6 +10062,14 @@ define <2 x i64> @test188(<2 x i64> %a, <2 x i64> %b) {
; AVX2-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test188:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512F-NEXT: vpminsq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test188:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminsq %xmm1, %xmm0, %xmm0
@@ -9618,6 +10130,14 @@ define <2 x i64> @test189(<2 x i64> %a, <2 x i64> %b) {
; AVX2-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test189:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512F-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test189:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxuq %xmm1, %xmm0, %xmm0
@@ -9678,6 +10198,14 @@ define <2 x i64> @test190(<2 x i64> %a, <2 x i64> %b) {
; AVX2-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test190:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512F-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test190:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmaxuq %xmm1, %xmm0, %xmm0
@@ -9738,6 +10266,14 @@ define <2 x i64> @test191(<2 x i64> %a, <2 x i64> %b) {
; AVX2-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test191:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512F-NEXT: vpminuq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test191:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminuq %xmm1, %xmm0, %xmm0
@@ -9798,6 +10334,14 @@ define <2 x i64> @test192(<2 x i64> %a, <2 x i64> %b) {
; AVX2-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
; AVX2-NEXT: retq
;
+; AVX512F-LABEL: test192:
+; AVX512F: # %bb.0: # %entry
+; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512F-NEXT: vpminuq %zmm1, %zmm0, %zmm0
+; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
+; AVX512F-NEXT: retq
+;
; AVX512BW-LABEL: test192:
; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpminuq %xmm1, %xmm0, %xmm0
diff --git a/llvm/test/CodeGen/X86/vselect-packss.ll b/llvm/test/CodeGen/X86/vselect-packss.ll
index 157245c0eee1..fa782630ee19 100644
--- a/llvm/test/CodeGen/X86/vselect-packss.ll
+++ b/llvm/test/CodeGen/X86/vselect-packss.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512NOBW --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512NOBW --check-prefix=AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512BW --check-prefix=AVX512BWNOVL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512BW --check-prefix=AVX512BWVL
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE42
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=AVX512VL
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX512BWNOVL
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX512BWVL
;
; General cases - packing of vector comparison to legal vector result types
diff --git a/llvm/test/CodeGen/X86/vselect-pcmp.ll b/llvm/test/CodeGen/X86/vselect-pcmp.ll
index 42fbdb186357..146fecfa7843 100644
--- a/llvm/test/CodeGen/X86/vselect-pcmp.ll
+++ b/llvm/test/CodeGen/X86/vselect-pcmp.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX12F,AVX12,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX12F,AVX12,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX12F,AVX512,AVX512F
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX12,AVX1
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX12,AVX2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX512,AVX512F
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512vl | FileCheck %s --check-prefixes=CHECK,AVX,AVX512,AVX512VL
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=xop | FileCheck %s --check-prefixes=CHECK,XOP
diff --git a/llvm/test/CodeGen/X86/vselect-zero.ll b/llvm/test/CodeGen/X86/vselect-zero.ll
index 70998b92bbbd..5bf1184c23b1 100644
--- a/llvm/test/CodeGen/X86/vselect-zero.ll
+++ b/llvm/test/CodeGen/X86/vselect-zero.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
; PR28925
diff --git a/llvm/test/CodeGen/X86/vselect.ll b/llvm/test/CodeGen/X86/vselect.ll
index 8890076242e9..2354ca1ca5c8 100644
--- a/llvm/test/CodeGen/X86/vselect.ll
+++ b/llvm/test/CodeGen/X86/vselect.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
; Verify that we don't emit packed vector shifts instructions if the
; condition used by the vector select is a vector of constants.
diff --git a/llvm/test/CodeGen/X86/x87.ll b/llvm/test/CodeGen/X86/x87.ll
index 1de82b3bdf4f..b5b4ac2dc9e0 100644
--- a/llvm/test/CodeGen/X86/x87.ll
+++ b/llvm/test/CodeGen/X86/x87.ll
@@ -3,7 +3,7 @@
; RUN: llc < %s -mtriple=i686-- -mattr=-x87 | FileCheck %s -check-prefixes=NOX8732,NOX87
; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87,-sse | FileCheck %s -check-prefixes=NOX8732,NOX87
; RUN: llc < %s -mtriple=i686-- -mattr=-x87,+sse | FileCheck %s -check-prefixes=NOX8732,NOX87
-; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87,-sse2 | FileCheck %s -check-prefixes=X8732_SSE,NOX87
+; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87,-sse2 | FileCheck %s -check-prefixes=NOX87
define void @test(i32 %i, i64 %l, float* %pf, double* %pd, fp128* %pld) nounwind readnone {
; X87-LABEL: test:
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