[PATCH] D91125: [AArch64][GlobalISel] Port some AArch64 target specific MUL combines from SDAG.

[Amara Emerson via Phabricator via llvm-commits]

aemerson created this revision.
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These do things like turn a multiply of a pow-2+1 into a shift and and add, which is a common pattern that pops up, and is universally better than expensive madd instructions with a constant.

I've added check lines to an existing codegen test since the code being ported is almost identical, however the mul by negative pow2 constant tests don't generate the same code because we're missing some generic G_MUL combines still.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D91125

Files:
  llvm/lib/Target/AArch64/AArch64Combine.td
  llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
  llvm/test/CodeGen/AArch64/mul_pow2.ll

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