[PATCH] D91092: [SVE][CodeGen] Lower scalable masked gathers

[Kerry McLaughlin via Phabricator via llvm-commits]

kmclaughlin created this revision.
kmclaughlin added reviewers: sdesmalen, efriedma, craig.topper.
Herald added subscribers: llvm-commits, ecnelises, psnobl, hiraditya, tschuett.
Herald added a reviewer: rengolin.
Herald added a project: LLVM.
kmclaughlin requested review of this revision.

Lowers the llvm.masked.gather intrinsics (scalar plus vector addressing mode only)

Changes in this patch:

- Add custom lowering for MGATHER, using getGatherVecOpcode() to choose the appropriate gather load opcode to use. Where the result of the load is extended, existing DAG combines (performSignExtendInRegCombine/performSVEAndCombine) combine the extend & gather.
- Improve codegen with refineIndexType/refineUniformBase, added in D90942 <https://reviews.llvm.org/D90942>
- Tests added for gather loads with 32 & 64-bit scaled & unscaled offsets.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D91092

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/test/CodeGen/AArch64/sve-masked-gather-32b-signed-scaled.ll
  llvm/test/CodeGen/AArch64/sve-masked-gather-32b-signed-unscaled.ll
  llvm/test/CodeGen/AArch64/sve-masked-gather-32b-unsigned-scaled.ll
  llvm/test/CodeGen/AArch64/sve-masked-gather-32b-unsigned-unscaled.ll
  llvm/test/CodeGen/AArch64/sve-masked-gather-64b-scaled.ll
  llvm/test/CodeGen/AArch64/sve-masked-gather-64b-unscaled.ll

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