[PATCH] D91048: [AMDGPU] Add new pseudos for indirect addressing with VGPR Indexing

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added a comment.

Is there a practical reason to have different pseudos for set_idx and movrel methods and not just expand a common pseudo accordingly post RA?



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Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:3611
 
 // Return true if the index is an SGPR and was set.
+static void setM0ToIndexFromSGPR(const SIInstrInfo *TII,
----------------
Comment is obsolete.


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Comment at: llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp:1338
+      // Unbundle instructions after the post-RA scheduler.
+      if (MI->getOpcode() == TargetOpcode::BUNDLE) {
         MachineBasicBlock::instr_iterator II(MI->getIterator());
----------------
MI.isBundle()


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https://reviews.llvm.org/D91048