[llvm] 9c098d3 - [X86] vector-narrow-binop.ll - remove unused check-prefixes

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 9 09:52:19 PST 2020


Author: Simon Pilgrim
Date: 2020-11-09T17:50:20Z
New Revision: 9c098d37f42b61b3ded911e3904bef0982a42f2d

URL: https://github.com/llvm/llvm-project/commit/9c098d37f42b61b3ded911e3904bef0982a42f2d
DIFF: https://github.com/llvm/llvm-project/commit/9c098d37f42b61b3ded911e3904bef0982a42f2d.diff

LOG: [X86] vector-narrow-binop.ll - remove unused check-prefixes

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/vector-narrow-binop.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/vector-narrow-binop.ll b/llvm/test/CodeGen/X86/vector-narrow-binop.ll
index e817da89862a..cf5f94832284 100644
--- a/llvm/test/CodeGen/X86/vector-narrow-binop.ll
+++ b/llvm/test/CodeGen/X86/vector-narrow-binop.ll
@@ -1,10 +1,10 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512DQ
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX,AVX512
 
 ; AVX1 has support for 256-bit bitwise logic because the FP variants were included.
 ; If using those ops requires extra insert/extract though, it's probably not worth it.
@@ -193,4 +193,3 @@ define <4 x double> @fmul_v2f64(<2 x  double> %x, <2 x double> %y) {
   %rdx = shufflevector <4 x double> %add, <4 x double> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
   ret <4 x double> %rdx
 }
-


        


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