[PATCH] D90591: [ARM] Introduce t2DoLoopStartTP
Sam Parker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 9 07:46:17 PST 2020
samparker accepted this revision.
samparker added inline comments.
This revision is now accepted and ready to land.
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Comment at: llvm/lib/Target/ARM/MVEVPTOptimisationsPass.cpp:189
+ int PredOp = findFirstVPTPredOperandIdx(*FirstVCTP);
+ if (FirstVCTP->getOperand(PredOp).getImm() != ARMVCC::None)
+ return false;
----------------
dmgreen wrote:
> samparker wrote:
> > What about only checking that it's not predicated in the case where there's more than one VCTP? At least then we can handle the VPT -> VCTP case.
> Would the backend pass handle multiple VCTP's in different blocks? If so we could just remove the check.
>
> I've done that here, but can add it back in if you think it might cause problems.
Yep, this should be fine. The backend can handle any number of VCTPs and VPT blocks.
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Comment at: llvm/test/CodeGen/Thumb2/mve-vldshuffle.ll:169
; CHECK-NEXT: vld20.32 {q0, q1}, [r0]
-; CHECK-NEXT: mov lr, r5
-; CHECK-NEXT: subs.w lr, lr, #1
----------------
How was the register allocator getting this so wrong?! I wonder if there's some logic missing, or some priorities need to be re-ordered, to handle the case of register classes with only one register.
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https://reviews.llvm.org/D90591/new/
https://reviews.llvm.org/D90591
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