[llvm] 55ea017 - [AMDGPU] Remove unused DisableDecoder machinery. NFC.

[Jay Foad via llvm-commits]

Author: Jay Foad
Date: 2020-11-09T13:53:27Z
New Revision: 55ea01775951cff610b9ceb6604bf52eb600eea8

URL: https://github.com/llvm/llvm-project/commit/55ea01775951cff610b9ceb6604bf52eb600eea8
DIFF: https://github.com/llvm/llvm-project/commit/55ea01775951cff610b9ceb6604bf52eb600eea8.diff

LOG: [AMDGPU] Remove unused DisableDecoder machinery. NFC.

This has been unused since D24738.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIInstrFormats.td
    llvm/lib/Target/AMDGPU/SIInstrInfo.td

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/SIInstrFormats.td b/llvm/lib/Target/AMDGPU/SIInstrFormats.td
index dbfdba6eec23..8e0dcbb9dc74 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrFormats.td
+++ b/llvm/lib/Target/AMDGPU/SIInstrFormats.td
@@ -205,11 +205,6 @@ class InstSI <dag outs, dag ins, string asm = "",
 
   let SchedRW = [Write32Bit];
 
-  field bits<1> DisableSIDecoder = 0;
-  field bits<1> DisableVIDecoder = 0;
-  field bits<1> DisableDecoder = 0;
-
-  let isAsmParserOnly = !ne(DisableDecoder{0}, {0});
   let AsmVariantName = AMDGPUAsmVariants.Default;
 
   // Avoid changing source registers in a way that violates constant bus read limitations.

diff  --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td
index 8a265b25f55c..4f526d18c459 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td
@@ -1447,7 +1447,6 @@ multiclass EXP_m<bit done> {
                 EXPe {
         let AssemblerPredicate = isGFX6GFX7;
         let DecoderNamespace = "GFX6GFX7";
-        let DisableDecoder = DisableSIDecoder;
       }
 
       def _vi : EXP_Helper<done>,
@@ -1455,7 +1454,6 @@ multiclass EXP_m<bit done> {
                 EXPe_vi {
         let AssemblerPredicate = isGFX8GFX9;
         let DecoderNamespace = "GFX8";
-        let DisableDecoder = DisableVIDecoder;
       }
 
       def _gfx10 : EXP_Helper<done>,
@@ -1463,7 +1461,6 @@ multiclass EXP_m<bit done> {
                 EXPe {
         let AssemblerPredicate = isGFX10Plus;
         let DecoderNamespace = "GFX10";
-        let DisableDecoder = DisableSIDecoder;
       }
     }
   }
@@ -2379,7 +2376,6 @@ class VINTRP_Real_si <bits <2> op, string opName, dag outs, dag ins,
   VINTRPCommon <outs, ins, asm, []>,
   VINTRPe <op>,
   SIMCInstr<opName, encodingFamily> {
-  let DisableDecoder = DisableSIDecoder;
 }
 
 class VINTRP_Real_vi <bits <2> op, string opName, dag outs, dag ins,
@@ -2389,7 +2385,6 @@ class VINTRP_Real_vi <bits <2> op, string opName, dag outs, dag ins,
   SIMCInstr<opName, SIEncodingFamily.VI> {
   let AssemblerPredicate = VIAssemblerPredicate;
   let DecoderNamespace = "GFX8";
-  let DisableDecoder = DisableVIDecoder;
 }
 
 // FIXME-GFX10: WIP.