[PATCH] D88126: [Machinesink] add more profitable pattern if target bb register pressure is not too high

[ChenZheng via Phabricator via llvm-commits]

shchenz added a comment.

> this is regressing a few internal workloads (physics simulations, AArch64) by a few percent. Did you do any performance measurements for this change?

Yes,  on PowerPC, I run this patch together with https://reviews.llvm.org/D86864 for SPEC CPU2017, I saw some little improvements, no reg found.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D88126/new/

https://reviews.llvm.org/D88126