[PATCH] D90965: [IfCvt] Don't use pristine register for counting liveins for predicated instructions.

[Dave Green via Phabricator via llvm-commits]

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The test case here hits machine verifier problems. There are volatile long loads that the results of do not get used, loading into two dead registers. IfCvt will predicate them and as it does will add implicit uses of the predicating registers due to thinking they are live in. As nothing has used the register, the machine verifier disagrees that they are really live and we end up with a failure.

The registers come from Pristine regs that LivePhysRegs counts as live. This patch adds a addLiveInsNoPristines method to be used instead in IfCvt, so that only really live in regs need to be added as implicit operands.


https://reviews.llvm.org/D90965

Files:
  llvm/include/llvm/CodeGen/LivePhysRegs.h
  llvm/lib/CodeGen/IfConversion.cpp
  llvm/lib/CodeGen/LivePhysRegs.cpp
  llvm/test/CodeGen/ARM/ldrd_ifcvt.ll

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