[PATCH] D90961: [RISCV] When matching SROIW, check all 64 bits of the OR mask

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 303520.
craig.topper edited the summary of this revision.
craig.topper added a comment.

Update SelectSLOIW in the same way. Check all bits of the mask and check the shift amount is less than 32. I haven't been able to produce any incorrect tests for sloiw though.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90961/new/

https://reviews.llvm.org/D90961

Files:
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/test/CodeGen/RISCV/rv64Zbb.ll

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