[PATCH] D90941: [SVE][CodeGen] Lower scalable masked scatters
Kerry McLaughlin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 6 06:50:37 PST 2020
kmclaughlin created this revision.
kmclaughlin added reviewers: sdesmalen, efriedma, fhahn, craig.topper.
Herald added subscribers: llvm-commits, psnobl, hiraditya, tschuett.
Herald added a project: LLVM.
kmclaughlin requested review of this revision.
Lowers the llvm.masked.scatter intrinsics (scalar plus vector addressing mode only)
Changes included in this patch:
- Custom lowering for MSCATTER, which chooses the appropriate scatter store opcode to use. Floating-point scatters are cast to integer, with patterns added to match FP reinterpret_casts.
- Added the getCanonicalIndexType function to convert redundant addressing modes (e.g. scaling is redundant when accessing bytes)
- Tests with 32 & 64-bit scaled & unscaled offsets
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D90941
Files:
llvm/include/llvm/CodeGen/SelectionDAGNodes.h
llvm/include/llvm/CodeGen/TargetLowering.h
llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.h
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/test/CodeGen/AArch64/sve-masked-scatter-32b-scaled.ll
llvm/test/CodeGen/AArch64/sve-masked-scatter-32b-unscaled.ll
llvm/test/CodeGen/AArch64/sve-masked-scatter-64b-scaled.ll
llvm/test/CodeGen/AArch64/sve-masked-scatter-64b-unscaled.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D90941.303436.patch
Type: text/x-patch
Size: 75431 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20201106/38c50dba/attachment.bin>
More information about the llvm-commits
mailing list